- 12 Aug, 2021 10 commits
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Make px30 SFC clock configurable Signed-off-by:
Jon Lin <jon.lin@rock-chips.com> Reviewed-by:
Jagan Teki <jagan@amarulasolutions.com> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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The Odroid Go Advance uses a Rockchip Serial Flash Controller with an XT25F128B SPI NOR flash chip. This adds support for both. Note that while both the controller and chip support quad mode, only two lines are connected to the chip. Changing the pinctrl to bus2 and setting tx and rx lines to 2 for this reason. Signed-off-by:
Chris Morgan <macromorgan@hotmail.com> Signed-off-by:
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Adds support for XT25F128B used on Odroid Go Advance. Unfortunately this chip uses a continuation code which I cannot seem to parse, so there are possibly going to be collisions with chips that use the same manufacturer/ID. Signed-off-by:
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Add the serial flash controller to the devicetree for the PX30. Signed-off-by:
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This patch adds support for setting the correct pin configuration for the Rockchip Serial Flash Controller found on the PX30. Signed-off-by:
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This patch adds support for the Rockchip serial flash controller found on the PX30 SoC. It should work for versions 3-5 of the SFC IP, however I am only able to test it on v3. This is adapted from the WIP SPI-MEM driver for the SFC on mainline Linux. Note that the main difference between this and earlier versions of the driver is that this one does not support DMA. In testing the performance difference (performing a dual mode read on a 128Mb chip) is negligible. DMA, if used, must also be disabled in SPL mode when using A-TF anyway. Signed-off-by:
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Currently there are a few arm32 rockchip board configs that don't generate u-boot-rockchip.bin when running make because CONFIG_BINMAN is not enabled. This patch changes CONFIG_ARCH_ROCKCHIP to also select CONFIG_BINMAN if CONFIG_SPL and !CONFIG_ARM64. Example builds that don't generate u-boot-rockchip.bin without this patch: export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make kylin-rk3036_defconfig make export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make rock_defconfig make export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make tinker-rk3288_defconfig make Signed-off-by:
Johan Gunnarsson <johan.gunnarsson@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
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Sync the rk3368 DTs and associated bits from 5.14-rc1. Signed-off-by:
Peter Robinson <pbrobinson@gmail.com> Reviewed-by:
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Sync the rk3328 DTs and associated bits from 5.14-rc1. Signed-off-by:
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Sync the rk3399 DTs and associated bits from 5.14-rc1. Signed-off-by:
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- 11 Aug, 2021 13 commits
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Remove the recommended MAC address from the network card. NanoPi R4S has a EEPROM attached to the 2nd I2C bus (U92), which stores the MAC address. Signed-off-by:
Xiaobo Tian <peterwillcn@gmail.com> Reviewed-by:
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The host-index-min property is invalid, so it inherits from the sdmmc definition in dtsi. Signed-off-by:
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Correct the LEDS label name and remove the board type prefix, which is actually unnecessary here, removes the redefined system status LED pin. Signed-off-by:
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This enable hs400 and SDMA support for emmc on evb-rk3399. Signed-off-by:
Yifeng Zhao <yifeng.zhao@rock-chips.com> Reviewed-by:
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This patch adds support for the RK3568 platform to this driver. Signed-off-by:
Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by:
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Add clock, phy and other configuration, it is convenient to support new controller. Here a short summary of the changes: - Add mmc_of_parse to parse dts config. - Remove OF_PLATDATA related code. - Reorder header inclusion. - Add phy ops. - add ops set_ios_post to modify the parameters of phy when the clock changes. - Add execute tuning api for hs200 tuning. Signed-off-by:
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In the Linux DT the file rk3xxx.dtsi is shared between rk3066 and rk3188. Both rk3xxx.dtsi and rk3188.dtsi have recently had some updates. For a future rk3066 support in U-boot this file must also update. Move U-boot specific things in a rk3188-radxarock-u-boot.dtsi file. Signed-off-by:
Johan Jonker <jbx6244@gmail.com> Reviewed-by:
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In the Linux DT the file rk3xxx.dtsi is shared between rk3066 and rk3188. Both rk3xxx.dtsi and rk3188.dtsi have recently had some updates. For a future rk3066 support in U-boot this file must also update. Move U-boot specific things in a rk3188-u-boot.dtsi file. Signed-off-by:
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In order to update the DT for rk3188 sync the power domain dt-binding header. This is the state as of v5.12 in Linux. Signed-off-by:
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In the Linux DT the file rk3xxx.dtsi is shared between rk3066 and rk3188. This file has recently had some updates. For a future rk3066 support in U-boot this file must also update. Move U-boot specific things in a rk3xxx-u-boot.dtsi file. Signed-off-by:
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In order to update the DT for rk3066 and rk3188 sync the clock dt-binding header. This is the state as of v5.12 in Linux. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
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Problem: board_spl_was_booted_from return wrong boot_devices[3] value /spi@ff1d0000 and same-as-spl dont work properly for SPINOR flash because arch/arm/mach-rockchip/spl-boot-order.c spl_node_to_boot_device need parse SPINOR flash node as UCLASS_SPI_FLASH spl-boot-order: same-as-spl > *** BOOT_SOURCE_ID 3 (2:emmc 3:spi 5:sd ... /spi@ff1d0000 > board_boot_order: could not map node @618 to a boot-device /sdhci@fe330000 > /mmc@fe320000 Solution: just change it to /spi@ff1d0000/flash@0 spl-boot-order: same-as-spl > *** BOOT_SOURCE_ID 3 (2:emmc 3:spi 5:sd ... /spi@ff1d0000/flash@0 > /sdhci@fe330000 > /mmc@fe320000 Signed-off-by:
Artem Lapkin <art@khadas.com> Reviewed-by:
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Basically all, i.e. rk3036.dtsi, rk3128.dtsi, rk3xxx.dtsi, rk322x.dtsi, rk3288.dtsi, rk3308-u-boot.dtsi, rk3328-u-boot.dtsi, rk3399-u-boot.dtsi and px30-u-boot.dtsi Rockchip SoC devicetrees which have mmc indexes are defining eMMC as mmc0 and sdmmc as mmc1. This means that the rule to try to boot from the SD card first is ignored, which as per comment is what we want and is important for distros, which rely on that. Fix this by setting the correct mmc index, i.e. first from mmc1 (SD card), second from mmc0 (eMMC). Signed-off-by:
Alex Bee <knaerzche@gmail.com> Reviewed-by:
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- 10 Aug, 2021 1 commit
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Tom Rini authored
Rsync all defconfig files using moveconfig.py Signed-off-by:Tom Rini <trini@konsulko.com>
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- 09 Aug, 2021 16 commits
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https://source.denx.de/u-boot/custodians/u-boot-imxTom Rini authored
u-boot-imx-20210809 - new SOC: add support for imx8ulp - Toradex fixes for colibri (vf / imx6 / imx7 / imx8x) - convert to DM for mx28evk - Fixes for Gateworks ventana boards CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/8639
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https://source.denx.de/u-boot/custodians/u-boot-dmTom Rini authored
Use log subsystem for dm_warn() Various minor bug fixes
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cmd_tbl_t is removed, need use struct cmd_tbl Signed-off-by:Peng Fan <peng.fan@nxp.com>
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Add i.MX8ULP EVK basic support, support SD/I2C/ENET/LPUART Log as below: I would keep some debug info for now, and after we move to be stable and production launch, we could drop that. U-Boot SPL 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800) Normal Boot upower_init: soc_id=48 upower_init: version:11.11.6 upower_init: start uPower RAM service user_upwr_rdy_callb: soc=b user_upwr_rdy_callb: RAM version:12.6 Turn on switches ok Turn on memories ok Clear DDR retention ok Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F0 frequency. Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F2 frequency. Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F2 frequency. complete De-Skew PLL is locked and ready WDT: Not found! Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 Load image from 0x3a800 by ROM_API NOTICE: BL31: v2.4(release):imx_5.10.35_2.0.0_imx8ulp_er-10-gf37e59b94 NOTICE: BL31: Built : 01:56:58, Jun 29 2021 NOTICE: upower_init: start uPower RAM service NOTICE: user_upwr_rdy_callb: soc=b NOTICE: user_upwr_rdy_callb: RAM version:12.6 U-Boot 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800) CPU: Freescale i.MX8ULP rev1.0 at 744 MHz Reset cause: POR Boot mode: Single boot Model: FSL i.MX8ULP EVK DRAM: 2 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 2 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial@293a0000 Out: serial@293a0000 Err: serial@293a0000 Net: Warning: ethernet@29950000 (eth0) using random MAC address - 96:35:88:62:e0:44 eth0: ethernet@29950000 Hit any key to stop autoboot: 0 Signed-off-by: -
Add i.MX8ULP dtsi Signed-off-by: -
Add iMX8ULP DDR initialization driver which loads the DDR timing parameters and executes the training procedure. When enabling IMX8ULP_DRAM_PHY_PLL_BYPASS, using PHY PLL bypass mode to do DDR init Signed-off-by:Ye Li <ye.li@nxp.com>
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Add upower api support, this is modified from upower firmware exported package. Signed-off-by: -
Move struct mu_type to common header to make it reusable by upower and S400 Signed-off-by: -
When booting from boot part1/2, the image offset should be 0, but ROM has a bug to return 0x8000. Has to workaround the issue before ROM fix it. Use a ROM function to know boot from emmc boot part or user part So we can set the image offset accordingly. Signed-off-by: -
Since CMC1 MR0 only reflects high 16 bits boot cfg used for AP domian, it does not connect to low 16 bits for RTD. So we can't get the correct boot mode. Change to use DGO_GP5 of SEC_SIM which is set by ROM. Signed-off-by: -
The CMC1 SRS reflects the current reset cause, not SSRS. Then you could get "Reset cause: WARM-WDG" when issue reset in U-Boot. Reviewed-by:
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This driver uses FSB to read some fuses, but not support program fuse. It only works in SPL (secure mode), u-boot needs traps to ATF to read them. Some fuses can read from S400 API and others are from FSB. Also support program some fuses via S400 API Signed-off-by: -
Add i.MX8ULP iomuxc support Signed-off-by: -
Add imx_get_mac_from_fuse for enet build pass Signed-off-by: -
Configure DCNANO and MIPI_DSI to be controlled by AD for single boot Signed-off-by:
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Read from ROM API to get current boot device. Signed-off-by:
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