1. 18 Aug, 2021 2 commits
  2. 17 Jun, 2021 3 commits
  3. 15 Apr, 2021 1 commit
  4. 02 Feb, 2021 1 commit
    • Simon Glass's avatar
      common: Drop asm/global_data.h from common header · 401d1c4f
      Simon Glass authored and Tom Rini's avatar Tom Rini committed
      Move this out of the common header and include it only where needed.  In
      a number of cases this requires adding "struct udevice;" to avoid adding
      another large header or in other cases replacing / adding missing header
      files that had been pulled in, very indirectly.   Finally, we have a few
      cases where we did not need to include <asm/global_data.h> at all, so
      remove that include.
      Signed-off-by: Simon Glass's avatarSimon Glass <sjg@chromium.org>
      Signed-off-by: Tom Rini's avatarTom Rini <trini@konsulko.com>
  5. 17 Jul, 2020 1 commit
    • Masahiro Yamada's avatar
      treewide: convert bd_t to struct bd_info by coccinelle · b75d8dc5
      Masahiro Yamada authored and Tom Rini's avatar Tom Rini committed
      The Linux coding style guide (Documentation/process/coding-style.rst)
      clearly says:
        It's a **mistake** to use typedef for structures and pointers.
      Besides, using typedef for structures is annoying when you try to make
      headers self-contained.
      Let's say you have the following function declaration in a header:
        void foo(bd_t *bd);
      This is not self-contained since bd_t is not defined.
      To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h>
        #include <asm/u-boot.h>
        void foo(bd_t *bd);
      Then, the include direcective pulls in more bloat needlessly.
      If you use 'struct bd_info' instead, it is enough to put a forward
      declaration as follows:
        struct bd_info;
        void foo(struct bd_info *bd);
      Right, typedef'ing bd_t is a mistake.
      I used coccinelle to generate this commit.
      The semantic patch that makes this change is as follows:
        typedef bd_t;
        +struct bd_info
      Signed-off-by: Masahiro Yamada's avatarMasahiro Yamada <masahiroy@kernel.org>
  6. 03 Jun, 2020 1 commit
  7. 18 May, 2020 1 commit
  8. 24 Jan, 2020 1 commit
  9. 17 Jan, 2020 1 commit
  10. 02 Dec, 2019 1 commit
  11. 11 Aug, 2019 1 commit
  12. 07 May, 2018 1 commit
    • Tom Rini's avatar
      SPDX: Convert all of our single license tags to Linux Kernel style · 83d290c5
      Tom Rini authored
      When U-Boot started using SPDX tags we were among the early adopters and
      there weren't a lot of other examples to borrow from.  So we picked the
      area of the file that usually had a full license text and replaced it
      with an appropriate SPDX-License-Identifier: entry.  Since then, the
      Linux Kernel has adopted SPDX tags and they place it as the very first
      line in a file (except where shebangs are used, then it's second line)
      and with slightly different comment styles than us.
      In part due to community overlap, in part due to better tag visibility
      and in part for other minor reasons, switch over to that style.
      This commit changes all instances where we have a single declared
      license in the tag as both the before and after are identical in tag
      contents.  There's also a few places where I found we did not have a tag
      and have introduced one.
      Signed-off-by: Tom Rini's avatarTom Rini <trini@konsulko.com>
  13. 16 Aug, 2017 1 commit
  14. 27 Sep, 2016 1 commit
  15. 25 Jan, 2016 1 commit
  16. 04 May, 2015 1 commit
  17. 20 Apr, 2015 1 commit
    • Ying Zhang's avatar
      board/t208xrdb: VID support · e5abb92c
      Ying Zhang authored
      The fuse status register provides the values from on-chip
      voltage ID efuses programmed at the factory.
      These values define the voltage requirements for
      the chip. u-boot reads FUSESR and translates the values
      into the appropriate commands to set the voltage output
      value of an external voltage regulator.
      Signed-off-by: default avatarYing Zhang <b40530@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
  18. 21 Nov, 2014 1 commit
    • Simon Glass's avatar
      fdt: Allow ft_board_setup() to report failure · e895a4b0
      Simon Glass authored
      This function can fail if the device tree runs out of space. Rather than
      silently booting with an incomplete device tree, allow the failure to be
      Unfortunately this involves changing a lot of places in the code. I have
      not changed behvaiour to return an error where one is not currently
      returned, to avoid unexpected breakage.
      Eventually it would be nice to allow boards to register functions to be
      called to update the device tree. This would avoid all the many functions
      to do this. However it's not clear yet if this should be done using driver
      model or with a linker list. This work is left for later.
      Signed-off-by: Simon Glass's avatarSimon Glass <sjg@chromium.org>
      Acked-by: Anatolij Gustschin's avatarAnatolij Gustschin <agust@denx.de>
  19. 22 Jul, 2014 1 commit
    • York Sun's avatar
      powerpc/mpc85xx: Check return value of find_tlb_idx · 9d045682
      York Sun authored
      find_tlb_idx() is called in board_early_init_r() on multiple boards.
      The return value is not checked before being used to disable a TLB.
      In normal case the return value wouldn't be -1. In case of a mis-
      configuration during porting to a new board, checking the return value
      may be helpful to reveal some user errors.
      Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
  20. 23 Apr, 2014 1 commit
  21. 07 Mar, 2014 1 commit
    • Shengzhou Liu's avatar
      powerpc/t2080rdb: Add T2080PCIe-RDB board support · 8d67c368
      Shengzhou Liu authored
      T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC.
      It works in two mode: standalone mode and PCIe endpoint mode.
      T2080PCIe-RDB Feature Overview
       - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
      DDR Memory:
       - Single memory controller capable of supporting DDR3 and DDR3-LP devices
       - 72bit 4GB DDR3-LP SODIMM in slot
      Ethernet interfaces:
       - Two 10M/100M/1G RGMII ports on-board
       - Two 10Gbps SFP+ ports on-board
       - Two 10Gbps Base-T ports on-board
       - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
      SerDes 16 lanes configuration:
       - SerDes-1 Lane A-B: to two 10G XFI fiber (MAC9 & MAC10)
       - SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2)
       - SerDes-1 Lane E-H: to PCIe Goldfinger (PCIe4 x4, Gen3)
       - SerDes-2 Lane A-D: to PCIe Slot (PCIe1 x4, Gen2)
       - SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2)
       - SerDes-2 Lane G-H: to SATA1 & SATA2
      IFC/Local Bus:
       - NOR:  128MB 16-bit NOR flash
       - NAND: 512MB 8-bit NAND flash
       - CPLD: for system controlling with programable header on-board
       - 64MB N25Q512 SPI flash
       - Two USB2.0 ports with internal PHY (both Type-A)
       - One PCIe x4 gold-finger
       - One PCIe x4 connector
       - One PCIe x2 end-point device (C293 Crypto co-processor)
       - Two SATA 2.0 ports on-board
       - support a TF-card on-board
       - Four I2C controllers.
       - Dual 4-pins UART serial ports
      Signed-off-by: default avatarShengzhou Liu <Shengzhou.Liu@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
  22. 13 Nov, 2013 1 commit
    • Priyanka Jain's avatar
      powerpc/t104xrdb: Add T1040RDB board support · 062ef1a6
      Priyanka Jain authored
      T1040RDB is Freescale Reference Design Board supporting
      the T1040 QorIQ Power Architecture™ processor.
       T1040RDB board Overview
       - Four e5500 cores, each with a private 256 KB L2 cache
       - 256 KB shared L3 CoreNet platform cache (CPC)
       - Interconnect CoreNet platform
       - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
       - Data Path Acceleration Architecture (DPAA) incorporating acceleration
       for the following functions:
          -  Packet parsing, classification, and distribution
          -  Queue management for scheduling, packet sequencing, and congestion
          -  Cryptography Acceleration
          - RegEx Pattern Matching Acceleration
          - IEEE Std 1588 support
          - Hardware buffer management for buffer allocation and deallocation
       - Ethernet interfaces
          - Integrated 8-port Gigabit Ethernet switch
          - Four 1 Gbps Ethernet controllers
       - SERDES Connections, 8 lanes supporting:
          - PCI
          - SGMII
          - QSGMII
          - SATA 2.0
       - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
       -IFC/Local Bus
          - NAND flash: 1GB 8-bit NAND flash
          - NOR: 128MB 16-bit NOR Flash
       - Ethernet
          - Two on-board RGMII 10/100/1G ethernet ports.
          - PHY #0 remains powered up during deep-sleep
       - CPLD
       - Clocks
          - System and DDR clock (SYSCLK, “DDRCLK”)
          - SERDES clocks
       - Power Supplies
       - USB
          - Supports two USB 2.0 ports with integrated PHYs
          - Two type A ports with 5V@1.5A per port.
       - SDHC
          - SDHC/SDXC connector
       - SPI
          - On-board 64MB SPI flash
       - I2C
          - Devices connected: EEPROM, thermal monitor, VID controller
       - Other IO
          - Two Serial ports
          - ProfiBus port
      Signed-off-by: default avatarPoonam Aggrwal <poonam.aggrwal@freescale.com>
      Signed-off-by: default avatarPrabhakar Kushwaha <prabhakar@freescale.com>
      Signed-off-by: default avatarPriyanka Jain <Priyanka.Jain@freescale.com>
      [York Sun: fixed Makefile]
      Acked-by: default avatarYork Sun <yorksun@freescale.com>
  23. 12 Aug, 2013 1 commit
  24. 09 Aug, 2013 1 commit
    • York Sun's avatar
      powerpc/T4240EMU: Add T4240EMU target · 1cb19fbb
      York Sun authored
      Add emulator support for T4240. Emulator has limited peripherals and
      interfaces. Difference between emulator and T4240QDS includes:
      	ECC for DDR is disabled due the procedure to load images
      	No board FPGA (QIXIS)
      	NOR flash has 32-bit port for higher loading speed
      	IFC and I2C timing don't really matter, so set them fast
      	No ethernet
      Signed-off-by: default avatarYork Sun <yorksun@freescale.com>