1. 13 Aug, 2021 1 commit
  2. 11 Aug, 2021 19 commits
  3. 10 Aug, 2021 11 commits
  4. 09 Aug, 2021 9 commits
    • Tom Rini's avatar
      Merge tag 'u-boot-imx-20210809' of https://source.denx.de/u-boot/custodians/u-boot-imx · 4da98ee1
      Tom Rini authored
      u-boot-imx-20210809
      
      - new SOC: add support for imx8ulp
      - Toradex fixes for colibri (vf / imx6 / imx7 / imx8x)
      - convert to DM for mx28evk
      - Fixes for Gateworks ventana boards
      
      CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/8639
      4da98ee1
    • Tom Rini's avatar
      Merge tag 'dm-pull-8aug21' of https://source.denx.de/u-boot/custodians/u-boot-dm · 0dec2030
      Tom Rini authored
      Use log subsystem for dm_warn()
      Various minor bug fixes
      0dec2030
    • Peng Fan's avatar
      imx: cmd: use struct cmd_tbl · a8f46306
      Peng Fan authored and Stefano Babic's avatar Stefano Babic committed
      
      
      cmd_tbl_t is removed, need use struct cmd_tbl
      Signed-off-by: Peng Fan's avatarPeng Fan <peng.fan@nxp.com>
      a8f46306
    • Peng Fan's avatar
      arm: imx: add i.MX8ULP EVK support · 3f2b4d72
      Peng Fan authored and Stefano Babic's avatar Stefano Babic committed
      
      
      Add i.MX8ULP EVK basic support, support SD/I2C/ENET/LPUART
      
      Log as below: I would keep some debug info for now, and after we move
      to be stable and production launch, we could drop that.
      
      U-Boot SPL 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800)
      Normal Boot
      upower_init: soc_id=48
      upower_init: version:11.11.6
      upower_init: start uPower RAM service
      user_upwr_rdy_callb: soc=b
      user_upwr_rdy_callb: RAM version:12.6
      Turn on switches ok
      Turn on memories ok
      Clear DDR retention ok
      Poll for freq_chg_req on SIM register and change to F1 frequency.
      Poll for freq_chg_req on SIM register and change to F0 frequency.
      Poll for freq_chg_req on SIM register and change to F1 frequency.
      Poll for freq_chg_req on SIM register and change to F2 frequency.
      Poll for freq_chg_req on SIM register and change to F1 frequency.
      Poll for freq_chg_req on SIM register and change to F2 frequency.
      complete
      De-Skew PLL is locked and ready
      WDT:   Not found!
      Trying to boot from BOOTROM
      image offset 0x8000, pagesize 0x200, ivt offset 0x0
      Load image from 0x3a800 by ROM_API
      NOTICE:  BL31: v2.4(release):imx_5.10.35_2.0.0_imx8ulp_er-10-gf37e59b94
      NOTICE:  BL31: Built : 01:56:58, Jun 29 2021
      NOTICE:  upower_init: start uPower RAM service
      NOTICE:  user_upwr_rdy_callb: soc=b
      NOTICE:  user_upwr_rdy_callb: RAM version:12.6
      
      U-Boot 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800)
      
      CPU:   Freescale i.MX8ULP rev1.0 at 744 MHz
      Reset cause: POR
      Boot mode: Single boot
      Model: FSL i.MX8ULP EVK
      DRAM:  2 GiB
      MMC:   FSL_SDHC: 0, FSL_SDHC: 2
      Loading Environment from MMC... ***
      Warning - bad CRC, using default environment
      
      In:    serial@293a0000
      Out:   serial@293a0000
      Err:   serial@293a0000
      Net:
      Warning: ethernet@29950000 (eth0) using random MAC address -
      96:35:88:62:e0:44
      eth0: ethernet@29950000
      Hit any key to stop autoboot:  0
      Signed-off-by: Peng Fan's avatarPeng Fan <peng.fan@nxp.com>
      3f2b4d72
    • Peng Fan's avatar
      arm: dts: add i.MX8ULP dtsi · 6beec0e7
      Peng Fan authored and Stefano Babic's avatar Stefano Babic committed
      
      
      Add i.MX8ULP dtsi
      Signed-off-by: Peng Fan's avatarPeng Fan <peng.fan@nxp.com>
      6beec0e7
    • Ye Li's avatar
      ddr: Add DDR driver for iMX8ULP · 7a6577fe
      Ye Li authored and Stefano Babic's avatar Stefano Babic committed
      
      
      Add iMX8ULP DDR initialization driver which loads the DDR timing
      parameters and executes the training procedure.
      
      When enabling IMX8ULP_DRAM_PHY_PLL_BYPASS, using PHY PLL bypass mode
      to do DDR init
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      7a6577fe
    • Peng Fan's avatar
      imx8ulp: add upower api support · 3e237941
      Peng Fan authored and Stefano Babic's avatar Stefano Babic committed
      
      
      Add upower api support, this is modified from upower firmware exported
      package.
      Signed-off-by: Peng Fan's avatarPeng Fan <peng.fan@nxp.com>
      3e237941
    • Peng Fan's avatar
      imx8ulp: move struct mu_type to common header · 4b9423e6
      Peng Fan authored and Stefano Babic's avatar Stefano Babic committed
      
      
      Move struct mu_type to common header to make it reusable by upower and
      S400
      Signed-off-by: Peng Fan's avatarPeng Fan <peng.fan@nxp.com>
      4b9423e6
    • Ye Li's avatar
      imx8ulp: Add workaround for eMMC boot · e8b68048
      Ye Li authored and Stefano Babic's avatar Stefano Babic committed
      
      
      When booting from boot part1/2, the image offset should be 0, but
      ROM has a bug to return 0x8000. Has to workaround the issue before
      ROM fix it.
      
      Use a ROM function to know boot from emmc boot part or user part
      So we can set the image offset accordingly.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      e8b68048