Commit 547b4cb2 authored by wdenk's avatar wdenk

Patches by Jon Loeliger, 11 May 2004:

(partially, as they contained a lot of crap)
parent 97d80fc3
......@@ -2,7 +2,7 @@
Changes since U-Boot 1.1.1:
======================================================================
* Patches Part 1 by Jon Loeliger, 11 May 2004:
* Patches by Jon Loeliger, 11 May 2004:
Dynamically handle REV1 and REV2 MPC85xx parts.
(Jon Loeliger, 10-May-2004).
New consistent memory map and Local Access Window across MPC85xx line.
......
......@@ -13,36 +13,44 @@ use the newest binutils-2.14.tar.bz2 from http://ftp.gnu.org/gnu/binutils.
shipped with your board. Then apply the following changes:
SW3[1-6]="all OFF" (boot from 32bit flash, no boot sequence is used)
SW10[2-6]="all OFF" (turn on CPM SCC for serial port,works for 8540/8560)
SW11[2]='OFF for dracom, ON for draco' (single switch to toggle draco.dracom mode)
SW11[2]='OFF for 8560, ON for 8540' (single switch to toggle 8540.8560 mode)
SW11[7]='ON' (rev2), 'OFF' (rev1)
SW4[7-8]="OFF OFF" (enable serial ports,I'm using the top serial connector)
SW22[1-4]="OFF OFF ON OFF"
SW5[1-10[="ON ON OFF OFF OFF OFF OFF OFF OFF OFF"
J1 = "Enable Prog" (Make sure your flash is programmable for development)
Ethernet PHY connectors(J47,J56) should be removed if you want to use the ethernet.
1.2 If you want to test PCI functionality with a 33Mhz PCI card, you will have to change
the system clock from the default 66Mhz to 33Mhz by setting SW15[1]="OFF" and
SW17[8]="OFF". After that you may also need double your platform clock(SW6) because
the system clock is now only half of its original value.
1.3 SW6 is a very important switch, it decides your platform clock and CPU clock based on
the on-board system clock(default 66MHz). Check the document along with your board
for details.
1.2 If you want to test PCI functionality with a 33Mhz PCI card, you will
have to change the system clock from the default 66Mhz to 33Mhz by
setting SW15[1]="OFF" and SW17[8]="OFF". After that you may also need
double your platform clock(SW6) because the system clock is now only
half of its original value.
1.3 SW6 is a very important switch, it decides your platform clock and CPU
clock based on the on-board system clock(default 66MHz). Check the
document along with your board for details.
2. MEMORY MAP TO WORK WITH LINUX KERNEL
2.1. For the initial bringup, we adopted a consistent memory scheme between u-boot and
linux kernel, you can customize it based on your system requirements:
DDR: 0x00000000-0x1fffffff (max 512MB)
PCI: 0xe0000000-0xefffffff (256MB)
RIO: 0xf0000000-0xf7ffffff (128MB)
Local SDRAM: 0xf8000000-0xfbffffff (64MB)
Local CSx: 0xfc000000-0xfdefffff (31MB) BCSR,RTC,ATM config,etc.
CCSRBAR: 0xfdf00000-0xfdffffff (1MB)
Flash: 0xfe000000-0xffffffff (max 32MB)
2.2 We are submitting Linux kernel patches for MPC8540 and MPC8560. Hope you will be
able to download them from linuxppc-2.4 public source by the time you are reading
this. Please make sure the kernel's ppcboot.h is consistent with U-Boot's u-boot.h,
then you can use two default configuration files in the kernel source as a test:
arch/ppc/configs/mpc8540ads_defconfig
arch/ppc/configs/mpc8560ads_defconfig
2.1. For the initial bringup, we adopted a consistent memory scheme
between u-boot and linux kernel, you can customize it based on your
system requirements:
0x0000_0000 0x7fff_ffff DDR 2G
0x8000_0000 0x9fff_ffff PCI MEM 512M
0xc000_0000 0xdfff_ffff Rapid IO 512M
0xe000_0000 0xe000_ffff CCSR 1M
0xe200_0000 0xe2ff_ffff PCI IO 16M
0xf000_0000 0xf7ff_ffff SDRAM 128M
0xf800_0000 0xf80f_ffff BCSR 1M
0xff00_0000 0xffff_ffff FLASH (boot bank) 16M
2.2 We are submitting Linux kernel patches for MPC8540 and MPC8560. You
can download them from linuxppc-2.4 public source. Please make sure the
kernel's ppcboot.h is consistent with U-Boot's u-boot.h. You can use two
default configuration files as your starting points to configure the
kernel:
arch/ppc/configs/mpc8540_ads_defconfig
arch/ppc/configs/mpc8560_ads_defconfig
3. DEFINITIONS AND COMPILATION
3.1 Explanation on NEW definitions in include/configs/MPC8540ADS.h and include/
......@@ -50,9 +58,6 @@ use the newest binutils-2.14.tar.bz2 from http://ftp.gnu.org/gnu/binutils.
CONFIG_BOOKE BOOKE(e.g. Motorola MPC85xx, IBM 440, etc)
CONFIG_E500 BOOKE e500 family(Motorola)
CONFIG_MPC85xx MPC8540,MPC8560 and their derivatives
CONFIG_MPC85xx_REV1 MPC85xx Rev 1 Chip, in general you will use a Rev2
chip from Nov.2003. If you still see this definition
while you have a Rev2(and newer) chip,undef this.
CONFIG_MPC8540 MPC8540 specific
CONFIG_MPC8560 MPC8560 specific
CONFIG_MPC8540ADS MPC8540ADS board specific
......@@ -61,8 +66,7 @@ use the newest binutils-2.14.tar.bz2 from http://ftp.gnu.org/gnu/binutils.
CONFIG_SPD_EEPROM Use SPD EEPROM for DDR auto configuration, you can also
manual config the DDR after undef this definition.
CONFIG_DDR_ECC only for ECC DDR module
CONFIG_DDR_DLL possible DLL fix needed for Rev1 chip for more stability.
you can disable this if you're having a newer chip.
CONFIG_DDR_DLL DLL fix on some ADS boards needed for more stability.
CONFIG_RAM_AS_FLASH after define this, you can load U-Boot into localbus
SDRAM and treat localbus SDRAM as a flash. We use this
memory based U-Boot before flash is working while Metrowerks
......@@ -78,8 +82,19 @@ use the newest binutils-2.14.tar.bz2 from http://ftp.gnu.org/gnu/binutils.
make MPC8560ADS_config (or make MPC8540ADS_config)
make
4. Note on the 10/100/1000 Ethernet controller:
4.1 Sometimes after U-Boot is up, the 'tftp' won't work well with TSEC ethernet. If that
4. Notes:
4.1 When connecting with kermit, the following commands must be present.in
your .kermrc file. These are especially important when booting as
MPC8560, as the serial console will not work without them:
set speed 115200
set carrier-watch off
set handshake none
set flow-control none
robust
4.2 Sometimes after U-Boot is up, the 'tftp' won't work well with TSEC ethernet. If that
happens, you can try the following steps to make network work:
MPC8560ADS>tftp 1000000 pImage
(if it hangs, use Ctrl-C to quit)
......@@ -88,6 +103,17 @@ use the newest binutils-2.14.tar.bz2 from http://ftp.gnu.org/gnu/binutils.
>1
>. (to quit this memory operation)
MPC8560ADS>tftp 1000000 pImage
4.3 If you're one of the early developers using the Rev1 8540/8560 chips, please use U-Boot
1.0.0, as the newer silicon will only support Rev2 and future revisions of 8540/8560.
4.4 Reflash U-boot Image using U-boot
=> tftp 0 u-boot.bin
=> protect off fff80000 ffffffff
=> erase fff80000 ffffffff
=> cp.b 0 fff80000 80000
5. Screen dump:
5.1 MPC8540ADS board
......
......@@ -89,7 +89,13 @@ typedef struct ccsr_ddr {
uint sdram_mode; /* 0x2118 - DDR SDRAM Mode Configuration */
char res7[8];
uint sdram_interval; /* 0x2124 - DDR SDRAM Interval Configuration */
#ifdef MPC85xx_DDR_SDRAM_CLK_CNTL
char res7_5[8];
uint sdram_clk_cntl; /* 0x2130 - DDR SDRAM Clock Control */
char res8[3276];
#else
char res8[3288];
#endif
uint data_err_inject_hi; /* 0x2e00 - DDR Memory Data Path Error Injection Mask High */
uint data_err_inject_lo; /* 0x2e04 - DDR Memory Data Path Error Injection Mask Low */
uint ecc_err_inject; /* 0x2e08 - DDR Memory Data Path Error Injection Mask ECC */
......@@ -150,7 +156,7 @@ typedef struct ccsr_i2c {
char res6[4075];
} ccsr_i2c_t;
#ifdef CONFIG_MPC8540
#if defined (CONFIG_MPC8540) || defined (CONFIG_MPC8555)
/* DUART Registers(0x4000-0x5000) */
typedef struct ccsr_duart {
char res1[1280];
......@@ -1015,7 +1021,7 @@ typedef struct ccsr_pic {
} ccsr_pic_t;
/* CPM Block(0x8_0000-0xc_0000) */
#ifdef CONFIG_MPC8540
#if defined (CONFIG_MPC8540) || defined (CONFIG_MPC8555)
typedef struct ccsr_cpm {
char res[262144];
} ccsr_cpm_t;
......
......@@ -83,14 +83,15 @@ typedef struct bd_info {
defined(CONFIG_SXNI855T) || \
defined(CONFIG_SVM_SC8xx) || \
defined(CONFIG_MPC8540ADS) || \
defined(CONFIG_MPC8560ADS) || \
defined(CONFIG_MPC8555CDS) || \
defined(CONFIG_MPC8560ADS) || \
defined(CONFIG_440_GX)
/* second onboard ethernet port */
unsigned char bi_enet1addr[6];
#endif
#if defined(CFG_GT_6426x) || defined(CONFIG_SVM_SC8xx) || \
defined(CONFIG_MPC8540ADS) || defined(CONFIG_MPC8560ADS) || \
defined(CONFIG_440_GX)
defined(CONFIG_MPC8555CDS) || defined(CONFIG_440_GX)
/* third onboard ethernet port */
unsigned char bi_enet2addr[6];
#endif
......
......@@ -316,6 +316,7 @@ uint get_immr (uint);
#endif
uint get_pir (void);
uint get_pvr (void);
uint get_svr (void);
uint rd_ic_cst (void);
void wr_ic_cst (uint);
void wr_ic_adr (uint);
......
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