Commit 6c7a1408 authored by wdenk's avatar wdenk

Patch by Mark Jonas, 01 Jul 2004:

Added support for Total5100 and Total5200 (Rev.1 and Rev.2)
MGT5100 and MPC5200 based Freescale platforms.
parent bc54f309
......@@ -2,6 +2,10 @@
Changes since U-Boot 1.1.1:
======================================================================
* Patch by Mark Jonas, 01 Jul 2004:
Added support for Total5100 and Total5200 (Rev.1 and Rev.2)
MGT5100 and MPC5200 based Freescale platforms.
* Patch by Philippe Robin, 01 Jul 2004:
Add initialization for Integrator and versatile board files.
......
......@@ -206,6 +206,11 @@ N: Yoo. Jonghoon
E: yooth@ipone.co.kr
D: Added port to the RPXlite board
N: Mark Jonas
E: mark.jonas@freescale.com
D: Support for Freescale Total5200 platform
W: http://www.mobilegt.com/
N: Sam Song
E: samsongshu@yahoo.com.cn
D: Port to the RPXlite_DW board
......
......@@ -26,7 +26,7 @@ LIST_5xx=" \
LIST_5xxx=" \
icecube_5100 icecube_5200 EVAL5200 PM520 \
TQM5200_AA \
Total5100 Total5200 Total5200_Rev2 TQM5200_AA \
"
#########################################################################
......
......@@ -255,6 +255,34 @@ TOP5200_config: unconfig
@ echo "#define CONFIG_$(@:_config=) 1" >include/config.h
@./mkconfig -a TOP5200 ppc mpc5xxx top5200 emk
Total5100_config \
Total5200_config \
Total5200_lowboot_config \
Total5200_Rev2_config \
Total5200_Rev2_lowboot_config: unconfig
@ >include/config.h
@[ -z "$(findstring 5100,$@)" ] || \
{ echo "#define CONFIG_MGT5100" >>include/config.h ; \
echo "... with MGT5100 processor" ; \
}
@[ -z "$(findstring 5200,$@)" ] || \
{ echo "#define CONFIG_MPC5200" >>include/config.h ; \
echo "... with MPC5200 processor" ; \
}
@[ -n "$(findstring Rev,$@)" ] || \
{ echo "#define CONFIG_TOTAL5200_REV 1" >>include/config.h ; \
echo "... revision 1 board" ; \
}
@[ -z "$(findstring Rev2_,$@)" ] || \
{ echo "#define CONFIG_TOTAL5200_REV 2" >>include/config.h ; \
echo "... revision 2 board" ; \
}
@[ -z "$(findstring lowboot_,$@)" ] || \
{ echo "TEXT_BASE = 0xFE000000" >board/total5200/config.tmp ; \
echo "... with lowboot configuration" ; \
}
@./mkconfig -a Total5200 ppc mpc5xxx total5200
PM520_config \
PM520_DDR_config \
PM520_ROMBOOT_config \
......
#
# (C) Copyright 2003-2004
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS := $(BOARD).o sdram.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-include .depend
#########################################################################
#
# (C) Copyright 2003-2004
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# Total5200 board:
#
# Valid values for TEXT_BASE are:
#
# 0xFFF00000 boot high (standard configuration)
# 0xFE000000 boot low
# 0x00100000 boot from RAM (for testing only)
#
sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
ifndef TEXT_BASE
## Standard: boot high
TEXT_BASE = 0xFFF00000
## For testing: boot from RAM
# TEXT_BASE = 0x00100000
endif
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
/*
* (C) Copyright 2004
* Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#define SDRAM_DDR 0 /* is SDR */
#if defined(CONFIG_MPC5200)
/* Settings for XLB = 132 MHz */
#define SDRAM_MODE 0x00CD0000
#define SDRAM_CONTROL 0x504F0000
#define SDRAM_CONFIG1 0xD2322800
#define SDRAM_CONFIG2 0x8AD70000
#elif defined(CONFIG_MGT5100)
/* Settings for XLB = 66 MHz */
#define SDRAM_MODE 0x008D0000
#define SDRAM_CONTROL 0x504F0000
#define SDRAM_CONFIG1 0xC2222600
#define SDRAM_CONFIG2 0x88B70004
#define SDRAM_ADDRSEL 0x02000000
#else
#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
#endif
/*
* (C) Copyright 2004
* Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* Micron MT48LC32M16A2-75 is compatible to:
* - Infineon HYB39S512160AT-75
*/
#define SDRAM_DDR 0 /* is SDR */
#if defined(CONFIG_MPC5200)
/* Settings for XLB = 132 MHz */
#define SDRAM_MODE 0x00CD0000
#define SDRAM_CONTROL 0x514F0000
#define SDRAM_CONFIG1 0xD2322800
#define SDRAM_CONFIG2 0x8AD70000
#else
#error CONFIG_MPC5200 is not defined
#endif
/*
* (C) Copyright 2003-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* (C) Copyright 2004
* Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <mpc5xxx.h>
#include "sdram.h"
#ifndef CFG_RAMBOOT
static void mpc5xxx_sdram_start (sdram_conf_t *sdram_conf, int hi_addr)
{
long hi_addr_bit = hi_addr ? 0x01000000 : 0;
/* unlock mode register */
*(vu_long *)MPC5XXX_SDRAM_CTRL = sdram_conf->control | 0x80000000 | hi_addr_bit;
__asm__ volatile ("sync");
/* precharge all banks */
*(vu_long *)MPC5XXX_SDRAM_CTRL = sdram_conf->control | 0x80000002 | hi_addr_bit;
__asm__ volatile ("sync");
if (sdram_conf->ddr) {
/* set mode register: extended mode */
*(vu_long *)MPC5XXX_SDRAM_MODE = sdram_conf->emode;
__asm__ volatile ("sync");
/* set mode register: reset DLL */
*(vu_long *)MPC5XXX_SDRAM_MODE = sdram_conf->mode | 0x04000000;
__asm__ volatile ("sync");
}
/* precharge all banks */
*(vu_long *)MPC5XXX_SDRAM_CTRL = sdram_conf->control | 0x80000002 | hi_addr_bit;
__asm__ volatile ("sync");
/* auto refresh */
*(vu_long *)MPC5XXX_SDRAM_CTRL = sdram_conf->control | 0x80000004 | hi_addr_bit;
__asm__ volatile ("sync");
/* set mode register */
*(vu_long *)MPC5XXX_SDRAM_MODE = sdram_conf->mode;
__asm__ volatile ("sync");
/* normal operation */
*(vu_long *)MPC5XXX_SDRAM_CTRL = sdram_conf->control | hi_addr_bit;
__asm__ volatile ("sync");
}
#endif
/*
* ATTENTION: Although partially referenced initdram does NOT make real use
* use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
* is something else than 0x00000000.
*/
#if defined(CONFIG_MPC5200)
long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf)
{
ulong dramsize = 0;
ulong dramsize2 = 0;
#ifndef CFG_RAMBOOT
ulong test1, test2;
/* setup SDRAM chip selects */
*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */
*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */
__asm__ volatile ("sync");
/* setup config registers */
*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = sdram_conf->config1;
*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = sdram_conf->config2;
__asm__ volatile ("sync");
if (sdram_conf->ddr) {
/* set tap delay */
*(vu_long *)MPC5XXX_CDM_PORCFG = sdram_conf->tapdelay;
__asm__ volatile ("sync");
}
/* find RAM size using SDRAM CS0 only */
mpc5xxx_sdram_start(sdram_conf, 0);
test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
mpc5xxx_sdram_start(sdram_conf, 1);
test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
if (test1 > test2) {
mpc5xxx_sdram_start(sdram_conf, 0);
dramsize = test1;
} else {
dramsize = test2;
}
/* memory smaller than 1MB is impossible */
if (dramsize < (1 << 20)) {
dramsize = 0;
}
/* set SDRAM CS0 size according to the amount of RAM found */
if (dramsize > 0) {
*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
} else {
*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
}
/* let SDRAM CS1 start right after CS0 */
*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */
/* find RAM size using SDRAM CS1 only */
mpc5xxx_sdram_start(sdram_conf, 0);
test1 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
mpc5xxx_sdram_start(sdram_conf, 1);
test2 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
if (test1 > test2) {
mpc5xxx_sdram_start(sdram_conf, 0);
dramsize2 = test1;
} else {
dramsize2 = test2;
}
/* memory smaller than 1MB is impossible */
if (dramsize2 < (1 << 20)) {
dramsize2 = 0;
}
/* set SDRAM CS1 size according to the amount of RAM found */
if (dramsize2 > 0) {
*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize
| (0x13 + __builtin_ffs(dramsize2 >> 20) - 1);
} else {
*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
}
#else /* CFG_RAMBOOT */
/* retrieve size of memory connected to SDRAM CS0 */
dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
if (dramsize >= 0x13) {
dramsize = (1 << (dramsize - 0x13)) << 20;
} else {
dramsize = 0;
}
/* retrieve size of memory connected to SDRAM CS1 */
dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
if (dramsize2 >= 0x13) {
dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
} else {
dramsize2 = 0;
}
#endif /* CFG_RAMBOOT */
return dramsize + dramsize2;
}
#elif defined(CONFIG_MGT5100)
long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf)
{
ulong dramsize = 0;
#ifndef CFG_RAMBOOT
ulong test1, test2;
/* setup and enable SDRAM chip selects */
*(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
*(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
*(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
__asm__ volatile ("sync");
/* setup config registers */
*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = sdram_conf->config1;
*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = sdram_conf->config2;
/* address select register */
*(vu_long *)MPC5XXX_SDRAM_XLBSEL = sdram_conf->addrsel;
__asm__ volatile ("sync");
/* find RAM size */
mpc5xxx_sdram_start(sdram_conf, 0);
test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
mpc5xxx_sdram_start(sdram_conf, 1);
test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
if (test1 > test2) {
mpc5xxx_sdram_start(sdram_conf, 0);
dramsize = test1;
} else {
dramsize = test2;
}
/* set SDRAM end address according to size */
*(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
#else /* CFG_RAMBOOT */
/* Retrieve amount of SDRAM available */
dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
#endif /* CFG_RAMBOOT */
return dramsize;
}
#else
#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
#endif
/*
* (C) Copyright 2004
* Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
typedef struct {
ulong ddr;
ulong mode;
ulong emode;
ulong control;
ulong config1;
ulong config2;
#if defined(CONFIG_MPC5200)
ulong tapdelay;
#endif
#if defined(CONFIG_MGT5100)
ulong addrsel;
#endif
} sdram_conf_t;
long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf);
/*
* (C) Copyright 2003-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* (C) Copyright 2004
* Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <mpc5xxx.h>
#include <pci.h>
#include "sdram.h"
#if CONFIG_TOTAL5200_REV==2
#include "mt48lc32m16a2-75.h"
#else
#include "mt48lc16m16a2-75.h"
#endif
long int initdram (int board_type)
{
sdram_conf_t sdram_conf;
sdram_conf.ddr = SDRAM_DDR;
sdram_conf.mode = SDRAM_MODE;
sdram_conf.emode = 0;
sdram_conf.control = SDRAM_CONTROL;
sdram_conf.config1 = SDRAM_CONFIG1;
sdram_conf.config2 = SDRAM_CONFIG2;
#if defined(CONFIG_MPC5200)
sdram_conf.tapdelay = 0;
#endif
#if defined(CONFIG_MGT5100)
sdram_conf.addrsel = SDRAM_ADDRSEL;
#endif
return mpc5xxx_sdram_init (&sdram_conf);
}
int checkboard (void)
{
#if defined(CONFIG_MPC5200)
#if CONFIG_TOTAL5200_REV==2
puts ("Board: Total5200 Rev.2 ");
#else
puts ("Board: Total5200 ");
#endif
#elif defined(CONFIG_MGT5100)
puts ("Board: Total5100 ");
#endif
/*
* Retrieve FPGA Revision.
*/
printf ("(FPGA %08X)\n", *(vu_long *) (CFG_FPGA_BASE + 0x400));
/*
* Take all peripherals in power-up mode.
*/
#if CONFIG_TOTAL5200_REV==2
*(vu_char *) (CFG_CPLD_BASE + 0x46) = 0x70;
#else
*(vu_long *) (CFG_CPLD_BASE + 0x400) = 0x70;
#endif
return 0;
}
#if defined(CONFIG_MGT5100)
int board_early_init_r(void)
{
/*
* Now, when we are in RAM, enable CS0
* because CS_BOOT cannot be written.
*/
*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
*(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
return 0;
}
#endif
#ifdef CONFIG_PCI
static struct pci_controller hose;
extern void pci_mpc5xxx_init(struct pci_controller *);
void pci_init_board(void)
{
pci_mpc5xxx_init(&hose);
}
#endif
#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
/* IRDA_1 aka PSC6_3 (pin C13) */
#define GPIO_IRDA_1 0x20000000UL
void init_ide_reset (void)
{
debug ("init_ide_reset\n");