Commit 8b07a110 authored by wdenk's avatar wdenk

* Patch by Fred Klatt, 25 Jun 2004:

  Add support for WindRiver's SBC8560 board

* Patch by Nicolas Lacressonniere, 24 Jun 2004
  Small Bugs fixes for "at91rm9200dk" board:
  - Timing modifications for SPI DataFlash access
  - Fix NAND flash detection bug

* Patch by Nicolas Lacressonniere, 24 Jun 2004:
  Add Support for Flash AT49BV6416 for AT91RM9200DK board
parent 0ac6f8b7
......@@ -2,6 +2,17 @@
Changes since U-Boot 1.1.1:
======================================================================
* Patch by Fred Klatt, 25 Jun 2004:
Add support for WindRiver's SBC8560 board
* Patch by Nicolas Lacressonniere, 24 Jun 2004
Small Bugs fixes for "at91rm9200dk" board:
- Timing modifications for SPI DataFlash access
- Fix NAND flash detection bug
* Patch by Nicolas Lacressonniere, 24 Jun 2004:
Add Support for Flash AT49BV6416 for AT91RM9200DK board
* Patch by Jon Loeliger, 17 June 2004:
Completion of the 8540ADS/8560ADS updates:
Fix some PCI and Rapid I/O memory maps,
......
......@@ -98,7 +98,7 @@ LIST_8260=" \
#########################################################################
LIST_85xx=" \
MPC8540ADS MPC8560ADS stxgp3 \
MPC8540ADS MPC8560ADS SBC8560 stxgp3 \
"
#########################################################################
......
......@@ -1010,6 +1010,17 @@ MPC8560ADS_config: unconfig
stxgp3_config: unconfig
@./mkconfig $(@:_config=) ppc mpc85xx stxgp3
SBC8560_33_config \
SBC8560_66_config: unconfig
@if [ "$(findstring _66_,$@)" ] ; then \
echo "#define CONFIG_PCI_66" >>include/config.h ; \
echo "... 66 MHz PCI" ; \
else \
>include/config.h ; \
echo "... 33 MHz PCI" ; \
fi
@./mkconfig -a SBC8560 ppc mpc85xx sbc8560
#########################################################################
## 74xx/7xx Systems
#########################################################################
......
......@@ -269,24 +269,24 @@ The following options need to be configured:
CONFIG_CSB272 CONFIG_JSE CONFIG_Sandpoint8240
CONFIG_CU824 CONFIG_LANTEC CONFIG_Sandpoint8245
CONFIG_DASA_SIM CONFIG_lwmon CONFIG_sbc8260
CONFIG_DB64360 CONFIG_MBX CONFIG_SM850
CONFIG_DB64460 CONFIG_MBX860T CONFIG_SPD823TS
CONFIG_DU405 CONFIG_MHPC CONFIG_STXGP3
CONFIG_DUET_ADS CONFIG_MIP405 CONFIG_SXNI855T
CONFIG_EBONY CONFIG_MOUSSE CONFIG_TQM823L
CONFIG_ELPPC CONFIG_MPC8260ADS CONFIG_TQM8260
CONFIG_ELPT860 CONFIG_MPC8540ADS CONFIG_TQM850L
CONFIG_ep8260 CONFIG_MPC8560ADS CONFIG_TQM855L
CONFIG_ERIC CONFIG_MUSENKI CONFIG_TQM860L
CONFIG_ESTEEM192E CONFIG_MVS1 CONFIG_TTTech
CONFIG_ETX094 CONFIG_NETPHONE CONFIG_UTX8245
CONFIG_EVB64260 CONFIG_NETTA CONFIG_V37
CONFIG_FADS823 CONFIG_NETVIA CONFIG_W7OLMC
CONFIG_FADS850SAR CONFIG_NX823 CONFIG_W7OLMG
CONFIG_FADS860T CONFIG_OCRTC CONFIG_WALNUT405
CONFIG_FLAGADM CONFIG_ORSG CONFIG_ZPC1900
CONFIG_FPS850L CONFIG_OXC CONFIG_ZUMA
CONFIG_FPS860L
CONFIG_DB64360 CONFIG_MBX CONFIG_sbc8560
CONFIG_DB64460 CONFIG_MBX860T CONFIG_SM850
CONFIG_DU405 CONFIG_MHPC CONFIG_SPD823TS
CONFIG_DUET_ADS CONFIG_MIP405 CONFIG_STXGP3
CONFIG_EBONY CONFIG_MOUSSE CONFIG_SXNI855T
CONFIG_ELPPC CONFIG_MPC8260ADS CONFIG_TQM823L
CONFIG_ELPT860 CONFIG_MPC8540ADS CONFIG_TQM8260
CONFIG_ep8260 CONFIG_MPC8560ADS CONFIG_TQM850L
CONFIG_ERIC CONFIG_MUSENKI CONFIG_TQM855L
CONFIG_ESTEEM192E CONFIG_MVS1 CONFIG_TQM860L
CONFIG_ETX094 CONFIG_NETPHONE CONFIG_TTTech
CONFIG_EVB64260 CONFIG_NETTA CONFIG_UTX8245
CONFIG_FADS823 CONFIG_NETVIA CONFIG_V37
CONFIG_FADS850SAR CONFIG_NX823 CONFIG_W7OLMC
CONFIG_FADS860T CONFIG_OCRTC CONFIG_W7OLMG
CONFIG_FLAGADM CONFIG_ORSG CONFIG_WALNUT405
CONFIG_FPS850L CONFIG_OXC CONFIG_ZPC1900
CONFIG_FPS860L CONFIG_ZUMA
ARM based boards:
-----------------
......@@ -2091,16 +2091,18 @@ configurations; the following names are supported:
CPCI405_config JSE_config rsdproto_config
CPCIISER4_config LANTEC_config Sandpoint8240_config
csb272_config lwmon_config sbc8260_config
CU824_config MBX860T_config SM850_config
DUET_ADS_config MBX_config SPD823TS_config
EBONY_config MPC8260ADS_config stxgp3_config
ELPT860_config MPC8540ADS_config SXNI855T_config
ESTEEM192E_config MPC8560ADS_config TQM823L_config
ETX094_config NETVIA_config TQM850L_config
FADS823_config omap1510inn_config TQM855L_config
FADS850SAR_config omap1610h2_config TQM860L_config
FADS860T_config omap1610inn_config WALNUT405_config
FPS850L_config omap5912osk_config ZPC1900_config
CU824_config MBX860T_config SBC8560_33_config
DUET_ADS_config MBX_config SBC8560_66_config
EBONY_config MPC8260ADS_config SM850_config
ELPT860_config MPC8540ADS_config SPD823TS_config
ESTEEM192E_config MPC8560ADS_config stxgp3_config
ETX094_config NETVIA_config SXNI855T_config
FADS823_config omap1510inn_config TQM823L_config
FADS850SAR_config omap1610h2_config TQM850L_config
FADS860T_config omap1610inn_config TQM855L_config
FPS850L_config omap5912osk_config TQM860L_config
WALNUT405_config
ZPC1900_config
Note: for some board special configuration names may exist; check if
additional information is available from the board vendor; for
......
......@@ -102,6 +102,10 @@ void nand_init (void)
*AT91C_PIOB_PER = AT91C_PIO_PB1; /* enable direct output enable */
*AT91C_PIOB_ODR = AT91C_PIO_PB1; /* disable output */
/* PIOB and PIOC clock enabling */
*AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
*AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
printf (" No SmartMedia card inserted\n");
#ifdef DEBUG
......
......@@ -42,20 +42,22 @@ typedef struct OrgDef
/* Flash Organizations */
OrgDef OrgAT49BV16x4[] =
{
{ 8, 8*1024 }, /* 8 * 8kBytes sectors */
{ 2, 32*1024 }, /* 2 * 32kBytes sectors */
{ 30, 64*1024 } /* 30 * 64kBytes sectors */
{ 8, 8*1024 }, /* 8 * 8 kBytes sectors */
{ 2, 32*1024 }, /* 2 * 32 kBytes sectors */
{ 30, 64*1024 }, /* 30 * 64 kBytes sectors */
};
OrgDef OrgAT49BV16x4A[] =
{
{ 8, 8*1024 }, /* 8 * 8kBytes sectors */
{ 31, 64*1024 } /* 31 * 64kBytes sectors */
{ 8, 8*1024 }, /* 8 * 8 kBytes sectors */
{ 31, 64*1024 }, /* 31 * 64 kBytes sectors */
};
#define FLASH_BANK_SIZE 0x200000 /* 2 MB */
#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
OrgDef OrgAT49BV6416[] =
{
{ 8, 8*1024 }, /* 8 * 8 kBytes sectors */
{ 127, 64*1024 }, /* 127 * 64 kBytes sectors */
};
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
......@@ -73,13 +75,11 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
#define CMD_ERASE_CONFIRM 0x0030
#define CMD_PROGRAM 0x00A0
#define CMD_UNLOCK_BYPASS 0x0020
#define CMD_SECTOR_UNLOCK 0x0070
#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00005555<<1)))
#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00002AAA<<1)))
#define IDENT_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x0000555<<1)))
#define IDENT_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x0000AAA<<1)))
#define BIT_ERASE_DONE 0x0080
#define BIT_RDY_MASK 0x0080
#define BIT_PROGRAM_ERROR 0x0020
......@@ -95,17 +95,17 @@ void flash_identification (flash_info_t * info)
{
volatile u16 manuf_code, device_code, add_device_code;
IDENT_FLASH_ADDR1 = FLASH_CODE1;
IDENT_FLASH_ADDR2 = FLASH_CODE2;
IDENT_FLASH_ADDR1 = ID_IN_CODE;
MEM_FLASH_ADDR1 = FLASH_CODE1;
MEM_FLASH_ADDR2 = FLASH_CODE2;
MEM_FLASH_ADDR1 = ID_IN_CODE;
manuf_code = *(volatile u16 *) CFG_FLASH_BASE;
device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2);
add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1));
IDENT_FLASH_ADDR1 = FLASH_CODE1;
IDENT_FLASH_ADDR2 = FLASH_CODE2;
IDENT_FLASH_ADDR1 = ID_OUT_CODE;
MEM_FLASH_ADDR1 = FLASH_CODE1;
MEM_FLASH_ADDR2 = FLASH_CODE2;
MEM_FLASH_ADDR1 = ID_OUT_CODE;
/* Vendor type */
info->flash_id = ATM_MANUFACT & FLASH_VENDMASK;
......@@ -117,14 +117,36 @@ void flash_identification (flash_info_t * info)
(ATM_ID_BV1614A & FLASH_TYPEMASK)) {
info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK;
printf ("AT49BV1614A (16Mbit)\n");
} else { /* AT49BV1614 Flash */
info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK;
printf ("AT49BV1614 (16Mbit)\n");
}
} else { /* AT49BV1614 Flash */
info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK;
printf ("AT49BV1614 (16Mbit)\n");
} else if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV6416 & FLASH_TYPEMASK)) {
info->flash_id |= ATM_ID_BV6416 & FLASH_TYPEMASK;
printf ("AT49BV6416 (64Mbit)\n");
}
}
ushort flash_number_sector(OrgDef *pOrgDef, unsigned int nb_blocks)
{
int i, nb_sectors = 0;
for (i=0; i<nb_blocks; i++){
nb_sectors += pOrgDef[i].sector_number;
}
return nb_sectors;
}
void flash_unlock_sector(flash_info_t * info, unsigned int sector)
{
volatile u16 *addr = (volatile u16 *) (info->start[sector]);
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
*addr = CMD_SECTOR_UNLOCK;
}
ulong flash_init (void)
{
......@@ -140,23 +162,29 @@ ulong flash_init (void)
flash_identification (&flash_info[i]);
flash_info[i].size = FLASH_BANK_SIZE;
if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
(ATM_ID_BV1614 & FLASH_TYPEMASK)) {
flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
pOrgDef = OrgAT49BV16x4;
flash_nb_blocks = sizeof (OrgAT49BV16x4) / sizeof (OrgDef);
} else { /* AT49BV1614A Flash */
flash_info[i].sector_count = CFG_MAX_FLASH_SECT - 1;
memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT - 1);
} else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
(ATM_ID_BV1614A & FLASH_TYPEMASK)){ /* AT49BV1614A Flash */
pOrgDef = OrgAT49BV16x4A;
flash_nb_blocks = sizeof (OrgAT49BV16x4A) / sizeof (OrgDef);
} else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
(ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */
pOrgDef = OrgAT49BV6416;
flash_nb_blocks = sizeof (OrgAT49BV6416) / sizeof (OrgDef);
} else {
flash_nb_blocks = 0;
pOrgDef = OrgAT49BV16x4;
}
flash_info[i].sector_count = flash_number_sector(pOrgDef, flash_nb_blocks);
memset (flash_info[i].protect, 0, flash_info[i].sector_count);
if (i == 0)
flashbase = PHYS_FLASH_1;
else
......@@ -164,15 +192,26 @@ ulong flash_init (void)
sector = 0;
start_address = flashbase;
flash_info[i].size = 0;
for (j = 0; j < flash_nb_blocks; j++) {
for (k = 0; k < pOrgDef[j].sector_number; k++) {
flash_info[i].start[sector++] = start_address;
start_address += pOrgDef[j].sector_size;
flash_info[i].size += pOrgDef[j].sector_size;
}
}
size += flash_info[i].size;
if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
(ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */
/* Unlock all sectors at reset */
for (j=0; j<flash_info[i].sector_count; j++){
flash_unlock_sector(&flash_info[i], j);
}
}
}
/* Protect binary boot image */
......@@ -215,6 +254,9 @@ void flash_print_info (flash_info_t * info)
case (ATM_ID_BV1614A & FLASH_TYPEMASK):
printf ("AT49BV1614A (16Mbit)\n");
break;
case (ATM_ID_BV6416 & FLASH_TYPEMASK):
printf ("AT49BV6416 (64Mbit)\n");
break;
default:
printf ("Unknown Chip Type\n");
goto Done;
......@@ -234,7 +276,7 @@ void flash_print_info (flash_info_t * info)
}
printf ("\n");
Done:
Done: ;
}
/*-----------------------------------------------------------------------
......
#
# (C) Copyright 2004
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>.
# Added support for Wind River SBC8560 board
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS := $(BOARD).o
SOBJS := init.o
#SOBJS :=
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS)
clean:
rm -f $(OBJS) $(SOBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-include .depend
#########################################################################
# Modified by Xianghua Xiao, X.Xiao@motorola.com
# (C) Copyright 2002,2003 Motorola Inc.
#
# (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>.
# Added support for Wind River SBC8560 board
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# based on mpc8560ads board
# default CCARBAR is at 0xff700000
# assume U-Boot is less than 256K
#
TEXT_BASE = 0xfffc0000
PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC8560=1
PLATFORM_CPPFLAGS += -DCONFIG_E500=1
/*
* Copyright (C) 2002,2003, Motorola Inc.
* Xianghua Xiao <X.Xiao@motorola.com>
*
* (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>.
* Added support for Wind River SBC8560 board
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
#include <asm/cache.h>
#include <asm/mmu.h>
#include <config.h>
#include <mpc85xx.h>
#define entry_start \
mflr r1 ; \
bl 0f ;
#define entry_end \
0: mflr r0 ; \
mtlr r1 ; \
blr ;
/* LAW(Local Access Window) configuration:
* 0000_0000-0800_0000: DDR(512M) -or- larger
* c000_0000-cfff_ffff: PCI(256M)
* d000_0000-dfff_ffff: RapidIO(256M)
* e000_0000-ffff_ffff: localbus(512M)
* e000_0000-e3ff_ffff: LBC 64M, 32-bit flash on CS6
* e400_0000-e7ff_ffff: LBC 64M, 32-bit flash on CS1
* e800_0000-efff_ffff: LBC 128M, nothing here
* f000_0000-f3ff_ffff: LBC 64M, SDRAM on CS3
* f400_0000-f7ff_ffff: LBC 64M, SDRAM on CS4
* f800_0000-fdff_ffff: LBC 64M, nothing here
* fc00_0000-fcff_ffff: LBC 16M, CSR,RTC,UART,etc on CS5
* fd00_0000-fdff_ffff: LBC 16M, nothing here
* fe00_0000-feff_ffff: LBC 16M, nothing here
* ff00_0000-ff6f_ffff: LBC 7M, nothing here
* ff70_0000-ff7f_ffff: CCSRBAR 1M
* ff80_0000-ffff_ffff: LBC 8M, 8-bit flash on CS0
* Note: CCSRBAR and L2-as-SRAM don't need configure Local Access
* Window.
* Note: If flash is 8M at default position(last 8M),no LAW needed.
*/
#if !defined(CONFIG_SPD_EEPROM)
#define LAWBAR0 ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff)
#define LAWAR0 (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_512M))
#else
#define LAWBAR0 0
#define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_512M)) & ~LAWAR_EN)
#endif
#define LAWBAR1 ((CFG_PCI_MEM_BASE>>12) & 0xfffff)
#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_256M))
#define LAWBAR2 ((0xe0000000>>12) & 0xfffff)
#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_512M))
.section .bootpg, "ax"
.globl law_entry
law_entry:
entry_start
.long 0x03
.long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2
entry_end
/* TLB1 entries configuration: */
.section .bootpg, "ax"
.globl tlb1_entry
tlb1_entry:
entry_start
.long 0x08 /* the following data table uses a few of 16 TLB entries */
/* TLB for CCSRBAR (IMMR) */
.long TLB1_MAS0(1,1,0)
.long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_1M)
.long TLB1_MAS2(((CFG_CCSRBAR>>12) & 0xfffff),0,0,0,0,1,0,1,0)
.long TLB1_MAS3(((CFG_CCSRBAR>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
/* TLB for Local Bus stuff, just map the whole 512M */
/* note that the LBC SDRAM is cache-inhibit and guarded, like everything else */
.long TLB1_MAS0(1,2,0)
.long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_256M)
.long TLB1_MAS2(((0xe0000000>>12) & 0xfffff),0,0,0,0,1,0,1,0)
.long TLB1_MAS3(((0xe0000000>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
.long TLB1_MAS0(1,3,0)
.long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_256M)
.long TLB1_MAS2(((0xf0000000>>12)&0xfffff),0,0,0,0,1,0,1,0)
.long TLB1_MAS3(((0xf0000000>>12)&0xfffff),0,0,0,0,0,1,0,1,0,1)
#if !defined(CONFIG_SPD_EEPROM)
.long TLB1_MAS0(1,4,0)
.long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_256M)
.long TLB1_MAS2(((CFG_DDR_SDRAM_BASE>>12) & 0xfffff),0,0,0,0,0,0,0,0)
.long TLB1_MAS3(((CFG_DDR_SDRAM_BASE>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
.long TLB1_MAS0(1,5,0)
.long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_256M)
.long TLB1_MAS2((((CFG_DDR_SDRAM_BASE+0x10000000)>>12) & 0xfffff),0,0,0,0,0,0,0,0)
.long TLB1_MAS3((((CFG_DDR_SDRAM_BASE+0x10000000)>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
#else
.long TLB1_MAS0(1,4,0)
.long TLB1_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
.long TLB1_MAS2(0,0,0,0,0,0,0,0,0)
.long TLB1_MAS3(0,0,0,0,0,0,1,0,1,0,1)
.long TLB1_MAS0(1,5,0)
.long TLB1_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
.long TLB1_MAS2(0,0,0,0,0,0,0,0,0)
.long TLB1_MAS3(0,0,0,0,0,0,1,0,1,0,1)
#endif
.long TLB1_MAS0(1,6,0)
.long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_16K)
#ifdef CONFIG_L2_INIT_RAM
.long TLB1_MAS2(((CFG_INIT_RAM_ADDR>>12) & 0xfffff),0,0,0,1,0,0,0,0)
#else
.long TLB1_MAS2(((CFG_INIT_RAM_ADDR>>12) & 0xfffff),0,0,0,0,0,0,0,0)
#endif
.long TLB1_MAS3(((CFG_INIT_RAM_ADDR>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
.long TLB1_MAS0(1,7,0)
.long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_256M)
.long TLB1_MAS2(((CFG_PCI_MEM_BASE>>12) & 0xfffff),0,0,0,0,1,0,1,0)
.long TLB1_MAS3(((CFG_PCI_MEM_BASE>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
.long TLB1_MAS0(1,15,0)
.long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_1M)
.long TLB1_MAS2(((CFG_CCSRBAR_DEFAULT>>12) & 0xfffff),0,0,0,0,1,0,1,0)
.long TLB1_MAS3(((CFG_CCSRBAR_DEFAULT>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
#else
.long TLB1_MAS0(1,15,0)
.long TLB1_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
.long TLB1_MAS2(0,0,0,0,0,0,0,0,0)
.long TLB1_MAS3(0,0,0,0,0,0,1,0,1,0,1)
#endif
entry_end
/*
* (C) Copyright 2003,Motorola Inc.
* Xianghua Xiao, (X.Xiao@motorola.com)
*
* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
*
* (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>.
* Added support for Wind River SBC8560 board
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
extern long int spd_sdram (void);
#include <common.h>
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <ioports.h>
#include <spd.h>
#include <miiphy.h>
long int fixed_sdram (void);