Commit c5f37625 authored by Biju Das's avatar Biju Das Committed by Marek Vasut

pinctrl: renesas: r8a77965: Add R8A774B1 PFC support

Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965),
however it doesn't have several automotive specific peripherals. Add
a r8a77965 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77965 and r8a774b1 SoC.

PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").
Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
parent 12e39630
...@@ -8,6 +8,7 @@ config R8A774A1 ...@@ -8,6 +8,7 @@ config R8A774A1
config R8A774B1 config R8A774B1
bool "Renesas SoC R8A774B1" bool "Renesas SoC R8A774B1"
imply CLK_R8A774B1 imply CLK_R8A774B1
imply PINCTRL_PFC_R8A774B1
config R8A774C0 config R8A774C0
bool "Renesas SoC R8A774C0" bool "Renesas SoC R8A774C0"
......
...@@ -67,6 +67,16 @@ config PINCTRL_PFC_R8A774A1 ...@@ -67,6 +67,16 @@ config PINCTRL_PFC_R8A774A1
the GPIO definitions and pin control functions for each available the GPIO definitions and pin control functions for each available
multiplex function. multiplex function.
config PINCTRL_PFC_R8A774B1
bool "Renesas RZ/G2 R8A774B1 pin control driver"
depends on PINCTRL_PFC
help
Support pin multiplexing control on Renesas RZ/G2N R8A774B1 SoCs.
The driver is controlled by a device tree node which contains both
the GPIO definitions and pin control functions for each available
multiplex function.
config PINCTRL_PFC_R8A7795 config PINCTRL_PFC_R8A7795
bool "Renesas RCar Gen3 R8A7795 pin control driver" bool "Renesas RCar Gen3 R8A7795 pin control driver"
depends on PINCTRL_PFC depends on PINCTRL_PFC
......
obj-$(CONFIG_PINCTRL_PFC) += pfc.o obj-$(CONFIG_PINCTRL_PFC) += pfc.o
obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o
obj-$(CONFIG_PINCTRL_PFC_R8A774B1) += pfc-r8a77965.o
obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o
obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o
obj-$(CONFIG_PINCTRL_PFC_R8A7792) += pfc-r8a7792.o obj-$(CONFIG_PINCTRL_PFC_R8A7792) += pfc-r8a7792.o
......
This diff is collapsed.
...@@ -33,6 +33,7 @@ enum sh_pfc_model { ...@@ -33,6 +33,7 @@ enum sh_pfc_model {
SH_PFC_R8A7795, SH_PFC_R8A7795,
SH_PFC_R8A7796, SH_PFC_R8A7796,
SH_PFC_R8A774A1, SH_PFC_R8A774A1,
SH_PFC_R8A774B1,
SH_PFC_R8A77965, SH_PFC_R8A77965,
SH_PFC_R8A77970, SH_PFC_R8A77970,
SH_PFC_R8A77980, SH_PFC_R8A77980,
...@@ -858,6 +859,10 @@ static int sh_pfc_pinctrl_probe(struct udevice *dev) ...@@ -858,6 +859,10 @@ static int sh_pfc_pinctrl_probe(struct udevice *dev)
if (model == SH_PFC_R8A774A1) if (model == SH_PFC_R8A774A1)
priv->pfc.info = &r8a774a1_pinmux_info; priv->pfc.info = &r8a774a1_pinmux_info;
#endif #endif
#ifdef CONFIG_PINCTRL_PFC_R8A774B1
if (model == SH_PFC_R8A774B1)
priv->pfc.info = &r8a774b1_pinmux_info;
#endif
#ifdef CONFIG_PINCTRL_PFC_R8A77965 #ifdef CONFIG_PINCTRL_PFC_R8A77965
if (model == SH_PFC_R8A77965) if (model == SH_PFC_R8A77965)
priv->pfc.info = &r8a77965_pinmux_info; priv->pfc.info = &r8a77965_pinmux_info;
...@@ -935,6 +940,12 @@ static const struct udevice_id sh_pfc_pinctrl_ids[] = { ...@@ -935,6 +940,12 @@ static const struct udevice_id sh_pfc_pinctrl_ids[] = {
.data = SH_PFC_R8A774A1, .data = SH_PFC_R8A774A1,
}, },
#endif #endif
#ifdef CONFIG_PINCTRL_PFC_R8A774B1
{
.compatible = "renesas,pfc-r8a774b1",
.data = SH_PFC_R8A774B1,
},
#endif
#ifdef CONFIG_PINCTRL_PFC_R8A77965 #ifdef CONFIG_PINCTRL_PFC_R8A77965
{ {
.compatible = "renesas,pfc-r8a77965", .compatible = "renesas,pfc-r8a77965",
......
...@@ -294,6 +294,7 @@ sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin, ...@@ -294,6 +294,7 @@ sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
unsigned int *bit); unsigned int *bit);
extern const struct sh_pfc_soc_info r8a774a1_pinmux_info; extern const struct sh_pfc_soc_info r8a774a1_pinmux_info;
extern const struct sh_pfc_soc_info r8a774b1_pinmux_info;
extern const struct sh_pfc_soc_info r8a7790_pinmux_info; extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
extern const struct sh_pfc_soc_info r8a7791_pinmux_info; extern const struct sh_pfc_soc_info r8a7791_pinmux_info;
extern const struct sh_pfc_soc_info r8a7792_pinmux_info; extern const struct sh_pfc_soc_info r8a7792_pinmux_info;
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment