GitLab

Samuel Holland authored Feb 08, 2021 and André Przywara committed Mar 31, 2021

The FIT description has access to the configuration variables. Use the
appropriate variable instead of hardcoding the address.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Samuel Holland authored Feb 08, 2021 and André Przywara committed Mar 31, 2021

binman can fill in the default FIT configuration index as selected by
the "default-dt" argument, which is set to CONFIG_DEFAULT_DEVICE_TREE.
Let's respect the user's configuration by taking advantage of this
feature, instead of always defaulting to the first device tree in
CONFIG_OF_LIST.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Samuel Holland authored Feb 07, 2021 and André Przywara committed Mar 31, 2021

The XHCI controller has its own clock and reset. Add them.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Samuel Holland authored Feb 07, 2021 and André Przywara committed Mar 31, 2021

The 32kHz clock ("LOSC") on sunxi SoCs is provided by the RTC. It is
used, among other things, by the XHCI controller in the H6. To be able
to call clk_get_bulk() on the XHCI controller, some device needs to
provide all referenced clocks.

Since LOSC is a fixed-rate always-on clock, implementation is trivial.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Icenowy Zheng authored Feb 26, 2021 and André Przywara committed Mar 31, 2021

Previously we do not have proper dual rank memory detection on R40
(because we omitted PIR_QSGATE, which does not work on R40 with our
configuration), and dual rank memory is just simply disabled as early
R40 boards available (Banana Pi M2 Ultra and Berry) have single rank
memory.

As a board with dual rank memory (Forlinx OKA40i-C) is now known to us,
we need to have a way to do memory rank detection to support that board.

Add some routine to detect memory rank by trying to access the memory
in rank 1 and check for error status of the memory controller, and then
enable dual rank memory on R40.

Similar routine can be used to detect half DQ width (which is also
detected by PIR_QSGATE on other SoCs), but it's left unimplemented
because there's no known R40 board with half DQ width now.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: Move R40 detect code call into sunxi_dram_init()]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Icenowy Zheng authored Feb 26, 2021 and André Przywara committed Mar 31, 2021

Previously we have known that R40 has a configuration register for its
rank 1, which allows different configuration than rank 0. Reverse
engineering of newest libdram of A64 from Allwinner shows that A64 has
this register too. It's bit 0 (which enables dual rank in rank 0
configuration register) means a dedicated rank size setup is used for
rank 1.

Now, Pine64 scheduled to use a 3GiB LPDDR3 DRAM chip (which has 2GiB
rank 0 and 1GiB rank 1) on PinePhone, that makes asymmetric dual rank
DRAM support necessary.

Add this support. The code could support both A64 and R40, but because
dual rank detection is broken on R40 now, we cannot really use it on R40
currently.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Jernej Skrabec authored Mar 23, 2021 and André Przywara committed Mar 31, 2021

Commit 69076dff

 ("cmd: pxe: add support for FDT overlays") added
support for loading DT overlay files to PXE boot. However, it needs
additional environment variable which points to memory location which
can be used to temporary store overlay data.

Add it and in the process unify alignment using spaces and fix comment.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Trusted Firmware now adds the /reserved-memory subnode to the DT at
runtime[1], putting in the right values.

Drop our hard-coded version, as this might clash with the actual values
(which have also changed), and rely on TF-A to add the node.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/7770

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

Loading Trusted-Firmware's BL31 at 16KB into DRAM was originally a hack
to allow sharing more code with the other SoCs (which use this offset
in SRAM). However there is no longer a reason for that, as the
problematic macros have been properly separated there.

The latest (and hopefully final) TF-A code drop now changes the load
address to the beginning of DRAM, which is also more easily protected
by the Trustzone memory controller (code to be done).

Adjust the load address of BL31 now, to avoid any issues with
incompatible versions later on (the TF-A patches are about to be merged).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>

Merge tag 'u-boot-atmel-2021.07-a' of https://source.denx.de/u-boot/custodians/u-boot-atmel into next

First set of u-boot-atmel features for 2021.07 cycle:
This small feature set includes the implementation of the slew rate for
the PIO4 pin controller device, and a fix for arm926ejs-based
microprocessors that avoids a crash.

Prepare v2021.04-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>

binman support for expanding entries, connections
misc fixes and improvements to sandbox, etc.
x86 CBFS improvements
x86 coreboot improvements

Jessica Clarke authored Mar 20, 2021 and Tom Rini committed Mar 28, 2021

On Arm-based Macs, -no_pie is ignored and gives a linker warning.
Moreover, the build falls over with:

  ld: Absolute addressing not allowed in arm64 code but used in '_image_type_ptr_aisimage' referencing '_image_type_aisimage'

for dumpimage and mkimage, since we put data structs in text sections
not data sections and so cannot have dynamic relocations. Instead, move
the sections to __DATA and drop disabling PIE.
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

Sean Anderson authored Mar 25, 2021 and Tom Rini committed Mar 28, 2021

We need this header for U_BOOT_CMD, which is always present even without
EFI.

Fixes: 82c468a0

 ("dm: test: Update Makefile conditions")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Simon Glass authored Mar 28, 2021 and Tom Rini committed Mar 28, 2021

When including this file on a board other than sandbox (e.g by enabling
UNIT_TEST and CMD_SETEXPR) an results. Fix it by declaring struct udevice
first.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

- Rework the deprecation warnings to be consistently phrased.
- Add in a warning for DM_I2C, for a year from next release.
- Fix Azure builds of Windows host tools.

We now see an error such as:
warning: database file for 'ucrt64' does not exist (use '-Sy' to download)
error: failed to prepare transaction (could not find database)

So use -Sy as suggested.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Simon Glass authored Mar 25, 2021 and Tom Rini committed Mar 27, 2021

This probably should have been done a while back since it is a core
system. Add a migration deadline of later this year, to catch the
stragglers.
Signed-off-by: Simon Glass <sjg@chromium.org>

Simon Glass authored Mar 25, 2021 and Tom Rini committed Mar 27, 2021

This message does not seem to make sense. It may be out of date. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>

Simon Glass authored Mar 25, 2021 and Tom Rini committed Mar 27, 2021

Update the CONFIG_DM_ETH check to use the 'deprecated' function.

Tested with snow

Old message:

===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

New message:

===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>

Simon Glass authored Mar 25, 2021 and Tom Rini committed Mar 27, 2021

Update the CONFIG_WDT check to use the 'deprecated' function.

Tested with kmcent2

Old message:

===================== WARNING ======================
This board does not use CONFIG_WDT (DM watchdog support).
Please update the board to use CONFIG_WDT before the
v2019.10 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

New message:

===================== WARNING ======================
This board does not use CONFIG_WDT (Driver Model
for DM watchdog). Please update the board to use
CONFIG_WDT before the v2019.10 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>

Simon Glass authored Mar 25, 2021 and Tom Rini committed Mar 27, 2021

Update the CONFIG_DM_SPI_FLASH check to use the 'deprecated' function.

Tested with vinco

Old message:

===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

New message:

===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH (Driver Model
for SPI flash). Please update the board to use
CONFIG_DM_SPI_FLASH before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>

Simon Glass authored Mar 25, 2021 and Tom Rini committed Mar 27, 2021

Update the CONFIG_DM_VIDEO check to use the 'deprecated' function.

Tested with pxm2

Old message:

===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO Please update
the board to use CONFIG_DM_VIDEO before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

New message:

===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO (Driver Model
for video). Please update the board to use
CONFIG_DM_VIDEO before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
==================================================
Signed-off-by: Simon Glass <sjg@chromium.org>

Simon Glass authored Mar 25, 2021 and Tom Rini committed Mar 27, 2021

Update the CONFIG_DM_PCI check to use the 'deprecated' function.

Tested with MPC8349ITX

Old message:

===================== WARNING ======================
This board does not use CONFIG_DM_PCI Please update
the board to use CONFIG_DM_PCI before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

New message:

===================== WARNING ======================
This board does not use CONFIG_DM_PCI (Driver Model
for PCI). Please update the board to use
CONFIG_DM_PCI before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>

Simon Glass authored Mar 25, 2021 and Tom Rini committed Mar 27, 2021

Update the CONFIG_LIBATA check to use the 'deprecated' function.

Tested with MPC8349ITX

Old message:

===================== WARNING ======================
This board does use CONFIG_LIBATA but has CONFIG_AHCI not
enabled. Please update the storage controller driver to use
CONFIG_AHCI before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

New message:

===================== WARNING ======================
This board does not use CONFIG_AHCI (Driver Model
for AHCI). Please update the board to use
CONFIG_AHCI before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>

Simon Glass authored Mar 25, 2021 and Tom Rini committed Mar 27, 2021

Update the CONFIG_MVSATA_IDE check to use the 'deprecated' function.

Tested with nas220

Old message:

===================== WARNING ======================
This board does use CONFIG_MVSATA_IDE which is not
ported to driver-model (DM) yet. Please update the storage
controller driver to use CONFIG_AHCI before the v2019.07
release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

New message:

===================== WARNING ======================
This board does not use CONFIG_AHCI (Driver Model
for AHCI instead of CONFIG_MVSATA_IDE). Please update the board to use
CONFIG_AHCI before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>

Simon Glass authored Mar 25, 2021 and Tom Rini committed Mar 27, 2021

Update the USB check to use the 'deprecated' function.

Tested with xpress

Old message:

===================== WARNING ======================
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

New message:

===================== WARNING ======================
This board does not use CONFIG_DM_USB (Driver Model
for  USB). Please update the board to use
CONFIG_DM_USB before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>

Simon Glass authored Mar 25, 2021 and Tom Rini committed Mar 27, 2021

Update the MMC check to use the 'deprecated' function.

Tested with zc5202

Old message:

===================== WARNING ======================
This board does not use CONFIG_DM_MMC. Please update
the board to use CONFIG_DM_MMC before the v2019.04 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

New message:

===================== WARNING ======================
This board does not use CONFIG_DM_MMC (Driver Model
for MMC). Please update the board to use
CONFIG_DM_MMC before the v2019.04 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>

Simon Glass authored Mar 25, 2021 and Tom Rini committed Mar 27, 2021

Add a function which can be called to report a migration problem. This
will make it easier to add new migration checks, since the logic and
strings are not spread out over 8 lines of code.
Signed-off-by: Simon Glass <sjg@chromium.org>

Simon Glass authored Mar 25, 2021 and Tom Rini committed Mar 27, 2021

At present the driver model migration messages are mixed with the others.
Collect them together before starting to refactor them.
Signed-off-by: Simon Glass <sjg@chromium.org>

Heinrich Schuchardt authored Mar 23, 2021 and Simon Glass committed Mar 27, 2021

On RISC-V the symbols __dyn_sym_start, dyn_sym_end are referenced in
efi_runtime_relocate().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

T Karthik Reddy authored Mar 17, 2021 and Simon Glass committed Mar 27, 2021

Add spi memory operations to relocate manually when
CONFIG_NEEDS_MANUAL_RELOC is enabled.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>

Add a few more internal checks to make sure offsets are correct, before
updating the dtb.

To make this easier, update the functions which add a property to return
that property,.
Signed-off-by: Simon Glass <sjg@chromium.org>

So far we have only needed to add subnodes to empty notds, so have not
had to deal with ordering. However this feature is needed for binman's
expanded nodes, since there may be another node in the same section.

While libfdt adds new properties after existing properties, it adds new
subnodes before existing subnodes. This means that we must reorder the
nodes in the cached version, so that the ordering remains consistent.

Update the sync implementation to sync existing subnodes first, then
add new ones, then tidy up the ordering in the cached version. Update the
test to cover this behaviour.

Also improve the comment about property syncing while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>

Add a new test that adds a subnode alongside an existing one, as well as
adding properties to a subnode. This will expand to adding multiple
subnodes in future patches. Put a node after the one we are adding to so
we can check that things sync correctly.

The testAddNode() test should be in the TestNode class since it is a node
test, so move it.
Signed-off-by: Simon Glass <sjg@chromium.org>

Once the tree has been synced, thus potentially moving things around in the
fdt, we set _cached_offsets to False so that a refresh will happen next
time a property is accessed.

This 'lazy' refresh doesn't really save much time, since refresh is a very
fast operation, just a single walk of the tree. Also, having the refresh
happen in the bowels of property access it makes it harder to figure out
what is going on.

Simplify the code by always doing a refresh before and after a sync. Set
_cached_offsets to True immediately after this, in the Refresh() function,
since this makes more sense than doing it in the caller.
Signed-off-by: Simon Glass <sjg@chromium.org>

If a property does not yet have an offset, then that means it exists in
the cache'd fdt but has not yet been synced back to the flat tree. Use
the dirty flag for this so we don't need to check the offset too. Improve
the comments for Prop and Node to make it clear what an offset of None
means.

Also clear the dirty flag after the property is synced.
Signed-off-by: Simon Glass <sjg@chromium.org>

Add the node name too so it is easy to see which node failed.
Signed-off-by: Simon Glass <sjg@chromium.org>