- 21 Apr, 2021 9 commits
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Currently DE2 driver uses functions which are defined in internal headers. They are not meant to be used outside of uclass framework. Switch DE2 driver to public ones. This has additional benefit that device_probe doesn't need to be called manually. Signed-off-by:
Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by:
Andre Przywara <andre.przywara@arm.com> Signed-off-by:
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There is no real need to read source_id at probe time. It also doesn't make sense to store it in driver private data since it's already stored in class platform data. While this looks like cleanup (and it is), it's also important for DE2 driver rework because this info will be filled later (after probe is already executed). Signed-off-by:
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TV driver was never fully implemented. Remove search for it from DE2 driver. Reviewed-by:
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No Allwinner board with DW-HDMI controller use separate I2C bus for EDID read. Remove that check. Reviewed-by:
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It turns out that there are two ways how hot plug detection can be done. One is standard way for DW HDMI controller - checking bit 2 in 0x3004 register. Another way is applicable only to Allwinner custom PHY - by checking bit 19 in register 0x10038. Both methods are equally good as far as we know. Use standard method in order to reduce amount of custom code. Reviewed-by:
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One of my monitors have only 4k@60 timing in base EDID block which is out of range for devices with HDMI 1.4. It turns out that it has additional detailed timings in CTA-861 Extension Block and two of them are appropriate for HDMI 1.4. Add additional search for valid detailed timing in extension block. Signed-off-by:
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Code which searches for valid detailed timing entry will be used in more places. Extract it. No functional change is made. However, descriptors are casted to edid_detailed_timing instead of edid_monitor_descriptor. Descriptor can be of either type, but since we're interested only in DTD, it is more fitting to cast to edid_detailed_timing. Reviewed-by:
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When searching for detailed timing in EDID, check for digital display earlier. There is no point parsing other parameters if this flag is not present. Reviewed-by:
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Currently driver accepts all resolution which won't work on 4k screens. Add validation callback which limits acceptable resolutions to 297 MHz. Reviewed-by:
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- 20 Apr, 2021 31 commits
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Tom Rini authored
- ARM64 GIC fix, CONFIG_IRQ now moved to Kconfig - IDE, lz4 fixes - octeontx cleanups / enhancements - highbank DM migration - psci updates - Enable use of -fstack-protector
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Add support for stack protector for UBOOT, SPL, and TPL as well as new pytest for stackprotector Signed-off-by:
Joel Peshkin <joel.peshkin@broadcom.com> Adjust UEFI build flags. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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The current usage of the variable CFLAGS_NON_EFI on the x86 architecture deviates from other architectures. Variable CFLAGS_NON_EFI is the list of compiler flags to be removed when building UEFI applications. It is not a list of flags to be added anywhere. Signed-off-by: -
regmap_read() only fills the first two bytes of val. The last two bytes are random data from the stack. This means the test will fail randomly. For low endian systems we could simply initialize val to 0 and get correct results. But tests should not depend on endianness. So let's use a pointer conversion instead. Signed-off-by:
Simon Glass <sjg@chromium.org>
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U-boot might display wrong module revision information for modules with an assembly version 'K'. "cfgblock create" does not takes into account all revision digits from PID8. This fix takes into account all digits of PID8 to store module revision. Signed-off-by:
Denys Drozdov <denys.drozdov@toradex.com> Reviewed-by:
Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
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Add usage details for reset command. Signed-off-by:Igor Opaniuk <igor.opaniuk@foundries.io>
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Add additional param for reset cmd, which provides type of reset. Signed-off-by: -
Use psci driver exported functions for reset/poweroff, instead of invoking directly invoke_psci_fn. Signed-off-by: -
Adds support for: * PSCI_FEATURES, which was introduced in PSCI 1.0. This provides API that allows discovering whether a specific PSCI function is implemented and its features. * SYSTEM_RESET2, which was introduced in PSCI 1.1, which extends existing SYSTEM_RESET. It provides support for vendor-specific resets, providing reset_type as an additional param. For additional details visit [1]. Implementations of some functions were borrowed from Linux PSCI driver code [2]. [1] https://developer.arm.com/documentation/den0022/latest/ [2] drivers/firmware/psci/psci.c Signed-off-by:
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Sync and add PSCI API versions 1.0/1.1 definitions from Linux. Signed-off-by: -
Tom Rini authored
Add #ifndef __SYSINFO_H__ ... #endif to prevent re-inclusion of this file. Signed-off-by:Tom Rini <trini@konsulko.com>
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Rob does not have access to any Calxeda systems anymore, also has expressed a lack of interest in those systems in the past. I have multiple working Midway nodes under my desk in the office, so am happy to take over maintainership. Signed-off-by: -
So far U-Boot was hard coding a (surely sufficient) memory size of 512 MB, even though all machines out there have at least 4GB of DRAM. Since U-Boot uses its memory knowledge to populate the EFI memory map, we are missing out here, at best losing everything beyond 4GB on Midway boxes (which typically come with 8GB of DRAM). Since the management processor populated the DT memory node already with the detected DRAM size and configuration, we use that to populate U-Boot's memory bank information, which is the base for the UEFI memory map. This finally allows us to get rid of the NR_DRAM_BANKS=0 hack, that we had in place to avoid U-Boot messing up the DT memory node before loading the kernel. Also, to cover the whole of memory, we need to enable PHYS_64BIT. Signed-off-by: -
So far we were defining a somewhat confusing PHYS_SDRAM_1_SIZE variable, which originally was only used for setting the memtest boundaries. This definition in highbank.h has been removed about a year ago (moved to Kconfig), so we also don't need the hard-coded size definition any longer. Get rid of the misleading memory size definition, which was actually wrong anyway (it's 4088 MB for those machines with just 4GB of DRAM). Signed-off-by: -
To squash that nasty warning message and make better use of the newly gained OF_CONTROL feature, let's convert the calxedagmac driver to the "new" driver model. The conversion is pretty straight forward, mostly just adjusting the use of the involved data structures. The only actual change is the required split of the receive routine into a receive and free_pkt part. Also this allows us to get rid of the hardcoded platform information and explicit init calls. This also uses the opportunity to wrap the code decoding the MMIO register base address, to make it safe for using PHYS_64BIT later. Signed-off-by:
Ramon Fried <rfried.dev@gmail.com>
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All Calxeda machines are actually a poster book example of device tree usage: the DT is loaded from flash by the management processor into DRAM, the memory node is populated with the detected DRAM size and this DT is then handed over to the kernel. So it's a shame that U-Boot didn't participate in this chain, but fortunately this is easy to fix: Define CONFIG_OF_CONTROL and CONFIG_OF_BOARD, and provide a trivial function to tell U-Boot about the (fixed) location of the DTB in DRAM. Then enable DM_SERIAL, to let the PL011 driver pick up the UART platform data from the DT. Also define AHCI, to bring this driver into the driver model world as well. Signed-off-by: -
So far on Highbank/Midway machines U-Boot only ever uses 512MB of DRAM, even though the machines have typically 4GB and 8GB, respectively. That means that so far we didn't need an extra limit for placing the DTB and initrd, as the 512MB are lower than the kernel's limit ("lowmem", typically 768MB). With U-Boot now needing to learn about the actual memory size (to correctly populate the EFI memory map), it might relocate fdt and initrd to the end of DRAM, which is out of reach of the kernel. So add limiting values to the fdt_high and initrd_high environment variables, to prevent U-Boot from using too high addresses. Signed-off-by: -
Document the bindings for fsl,anatop-regulator Signed-off-by:
Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Reviewed-by:
Sean Anderson <sean.anderson@seco.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Peng Fan <peng.fan@nxp.com> Reviewed-by:
Jaehoon Chung <jh80.chung@samsung.com>
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Anatop is an integrated regulator inside i.MX6 SoC. There are 3 digital regulators which controls PU, CORE (ARM), and SOC. And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB). This patch adds the Anatop regulator driver. Signed-off-by:
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Trying to compile with CONFIG_CMD_MMC=y and CONFIG_MMC=n leads to errors: riscv64-linux-gnu-ld.bfd: cmd/built-in.o: in function `do_mmcops': cmd/mmc.c:984: undefined reference to `get_mmc_num' riscv64-linux-gnu-ld.bfd: cmd/built-in.o: in function `do_mmc_setdsr': cmd/mmc.c:873: undefined reference to `find_mmc_device' Add missing dependency. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com>
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The fdt node offset is apparently not set properly when probed causing no MDIO busses to be found. Fix this by obtaining the offset. Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Reviewed-by:
Stefan Roese <sr@denx.de>
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After check for maximum between max id and available ports, also check if available port count is less than max id and update. In the case of the CN8030 OcteonTX SoC max_id needs to be reduced to the number of ports found otherwise the following occurs on a scan: GW6404-B> scsi scan scanning bus for devices... Target spinup took 0 ms. AHCI 0001.0300 32 slots 1 ports 6 Gbps 0x1 impl SATA mode flags: 64bit ncq ilck stag pm led clo only pmp fbss pio slum part ccc apst Device 0: (0:0) Vendor: ATA Prod.: SanDisk SD8SFAT0 Rev: Z233 Type: Hard Disk Capacity: 61057.3 MB = 59.6 GB (125045424 x 512) "Synchronous Abort" handler, esr 0x96000006 elr: 000000000052f824 lr : 000000000052fa10 (reloc) elr: 000000007fee9824 lr : 000000007fee9a10 x0 : 0000000000000001 x1 : 0000000000000001 x2 : 000000007bea3528 x3 : 000000007bea3580 x4 : 0000000000000200 x5 : 0000000000000000 x6 : 0000000000000002 x7 : 000000007bea3540 x8 : 00000000fffffff8 x9 : 0000000000000008 x10: 00000000000186a0 x11: 000000000000000d x12: 0000000000000006 x13: 000000000001869f x14: 0000000000000007 x15: 00000000ffffffff x16: 000000007ff439a5 x17: 000000007ff5730c x18: 000000007bea9de0 x19: 000000007ff7a580 x20: 000000007bec79f8 x21: 0000000000000000 x22: 000000007bea3580 x23: 0000000000000000 x24: 0000000000000000 x25: 000000007bec7a00 x26: 00000000ffffffc0 x27: 000000007bec79d0 x28: 000000007beb51c0 x29: 000000007bea3480 Code: 91246800 940130c2 12800000 1400004f (b9402ae0) Resetting CPU ... Signed-off-by:Suneel Garapati <sgarapati@marvell.com> Reviewed-by:
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Revert a change that occured between the Marvell SDK-10.1.1.0 and SDK-10.3.1.1 which broke QSMII phy support. Signed-off-by: -
The OcteonTX uses ARM's SBSA Watchdog device Signed-off-by:
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Support Generic Distro Default config Signed-off-by:
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Move CONFIG_SUPPORT_RAW_INITRD out of the octeontx_common header and into the defconfig files. Signed-off-by:
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Signed-off-by:Karl Beldan <karl.beldan+oss@gmail.com>
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Fixes IDE issues found on the Malta board under Qemu: 1) DMA implied commands were sent to the controller in stead of the PIO variants. The rest of the code is DMA free and written for PIO operation. 2) direct pointer access was used to read and write the registers instead of the inb/inw/outb/outw functions/macros. Registers don't have to be memory mapped and ATA_CURR_BASE() does not have to return an offset from address zero. 3) Endian isues in ide_ident() and reading/writing data in general. Names were corrupted and sizes misreported. Tested malta_defconfig and maltael_defconfig to work again in Qemu. Signed-off-by:
Reinoud Zandijk <reinoud@NetBSD.org> Tested-by:
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Enable IRQ using select for sandbox architecture. Signed-off-by:
Wasim Khan <wasim.khan@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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use 'select' to enable IRQ as it does not have architecture specific dependency. Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by:
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GIC_V3_ITS uses UCLASS_IRQ driver. Update Kconfig to select IRQ when GIC_V3_ITS is enabled. Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com>
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