• Aneesh V's avatar
    armv7: cache maintenance operations for armv7 · 2c451f78
    Aneesh V authored
    - Add a framework for layered cache maintenance
    	- separate out SOC specific outer cache maintenance from
    	  maintenance of caches known to CPU
    - Add generic ARMv7 cache maintenance operations that affect all
      caches known to ARMv7 CPUs. For instance in Cortex-A8 these
      opertions will affect both L1 and L2 caches. In Cortex-A9
      these will affect only L1 cache
    - D-cache operations supported:
    	- Invalidate entire D-cache
    	- Invalidate D-cache range
    	- Flush(clean & invalidate) entire D-cache
    	- Flush D-cache range
    - I-cache operations supported:
    	- Invalidate entire I-cache
    - Add maintenance functions for TLB, branch predictor array etc.
    - Enable -march=armv7-a so that armv7 assembly instructions can be
    Signed-off-by: default avatarAneesh V <aneesh@ti.com>