Commit 0edf8b5b authored by Stefano Babic's avatar Stefano Babic Committed by Albert ARIBAUD
Browse files

MX5: Update to autogenerated asm-offsets.h



On i.MX5, the asm-offsets.h file is not yet generated as it should be.
Signed-off-by: Stefano Babic's avatarStefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
parent 39f0023e
......@@ -45,4 +45,6 @@ include $(SRCTREE)/rules.mk
sinclude $(obj).depend
lowlevel_init.o : $(TOPDIR)/include/asm/arch/asm-offsets.h
#########################################################################
/*
* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
*
* This program is used to generate definitions needed by
* assembly language modules.
*
* We use the technique used in the OSF Mach kernel code:
* generate asm statements containing #defines,
* compile this file to assembler, and then extract the
* #defines from the assembly-language output.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <common.h>
#include <asm/arch/imx-regs.h>
#include <linux/kbuild.h>
int main(void)
{
/* Round up to make sure size gives nice stack alignment */
DEFINE(CLKCTL_CCMR, offsetof(struct clkctl, ccr));
DEFINE(CLKCTL_CCDR, offsetof(struct clkctl, ccdr));
DEFINE(CLKCTL_CSR, offsetof(struct clkctl, csr));
DEFINE(CLKCTL_CCSR, offsetof(struct clkctl, ccsr));
DEFINE(CLKCTL_CACRR, offsetof(struct clkctl, cacrr));
DEFINE(CLKCTL_CBCDR, offsetof(struct clkctl, cbcdr));
DEFINE(CLKCTL_CBCMR, offsetof(struct clkctl, cbcmr));
DEFINE(CLKCTL_CSCMR1, offsetof(struct clkctl, cscmr1));
DEFINE(CLKCTL_CSCMR2, offsetof(struct clkctl, cscmr2));
DEFINE(CLKCTL_CSCDR1, offsetof(struct clkctl, cscdr1));
DEFINE(CLKCTL_CS1CDR, offsetof(struct clkctl, cs1cdr));
DEFINE(CLKCTL_CS2CDR, offsetof(struct clkctl, cs2cdr));
DEFINE(CLKCTL_CDCDR, offsetof(struct clkctl, cdcdr));
DEFINE(CLKCTL_CHSCCDR, offsetof(struct clkctl, chsccdr));
DEFINE(CLKCTL_CSCDR2, offsetof(struct clkctl, cscdr2));
DEFINE(CLKCTL_CSCDR3, offsetof(struct clkctl, cscdr3));
DEFINE(CLKCTL_CSCDR4, offsetof(struct clkctl, cscdr4));
DEFINE(CLKCTL_CWDR, offsetof(struct clkctl, cwdr));
DEFINE(CLKCTL_CDHIPR, offsetof(struct clkctl, cdhipr));
DEFINE(CLKCTL_CDCR, offsetof(struct clkctl, cdcr));
DEFINE(CLKCTL_CTOR, offsetof(struct clkctl, ctor));
DEFINE(CLKCTL_CLPCR, offsetof(struct clkctl, clpcr));
DEFINE(CLKCTL_CISR, offsetof(struct clkctl, cisr));
DEFINE(CLKCTL_CIMR, offsetof(struct clkctl, cimr));
DEFINE(CLKCTL_CCOSR, offsetof(struct clkctl, ccosr));
DEFINE(CLKCTL_CGPR, offsetof(struct clkctl, cgpr));
DEFINE(CLKCTL_CCGR0, offsetof(struct clkctl, ccgr0));
DEFINE(CLKCTL_CCGR1, offsetof(struct clkctl, ccgr1));
DEFINE(CLKCTL_CCGR2, offsetof(struct clkctl, ccgr2));
DEFINE(CLKCTL_CCGR3, offsetof(struct clkctl, ccgr3));
DEFINE(CLKCTL_CCGR4, offsetof(struct clkctl, ccgr4));
DEFINE(CLKCTL_CCGR5, offsetof(struct clkctl, ccgr5));
DEFINE(CLKCTL_CCGR6, offsetof(struct clkctl, ccgr6));
DEFINE(CLKCTL_CMEOR, offsetof(struct clkctl, cmeor));
#if defined(CONFIG_MX53)
DEFINE(CLKCTL_CCGR7, offsetof(struct clkctl, ccgr7));
#endif
/* DPLL */
DEFINE(PLL_DP_CTL, offsetof(struct dpll, dp_ctl));
DEFINE(PLL_DP_CONFIG, offsetof(struct dpll, dp_config));
DEFINE(PLL_DP_OP, offsetof(struct dpll, dp_op));
DEFINE(PLL_DP_MFD, offsetof(struct dpll, dp_mfd));
DEFINE(PLL_DP_MFN, offsetof(struct dpll, dp_mfn));
DEFINE(PLL_DP_HFS_OP, offsetof(struct dpll, dp_hfs_op));
DEFINE(PLL_DP_HFS_MFD, offsetof(struct dpll, dp_hfs_mfd));
DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn));
return 0;
}
/*
* needed for arch/arm/cpu/armv7/mx51/lowlevel_init.S
*
* These should be auto-generated
*/
/* CCM */
#define CLKCTL_CCR 0x00
#define CLKCTL_CCDR 0x04
#define CLKCTL_CSR 0x08
#define CLKCTL_CCSR 0x0C
#define CLKCTL_CACRR 0x10
#define CLKCTL_CBCDR 0x14
#define CLKCTL_CBCMR 0x18
#define CLKCTL_CSCMR1 0x1C
#define CLKCTL_CSCMR2 0x20
#define CLKCTL_CSCDR1 0x24
#define CLKCTL_CS1CDR 0x28
#define CLKCTL_CS2CDR 0x2C
#define CLKCTL_CDCDR 0x30
#define CLKCTL_CHSCCDR 0x34
#define CLKCTL_CSCDR2 0x38
#define CLKCTL_CSCDR3 0x3C
#define CLKCTL_CSCDR4 0x40
#define CLKCTL_CWDR 0x44
#define CLKCTL_CDHIPR 0x48
#define CLKCTL_CDCR 0x4C
#define CLKCTL_CTOR 0x50
#define CLKCTL_CLPCR 0x54
#define CLKCTL_CISR 0x58
#define CLKCTL_CIMR 0x5C
#define CLKCTL_CCOSR 0x60
#define CLKCTL_CGPR 0x64
#define CLKCTL_CCGR0 0x68
#define CLKCTL_CCGR1 0x6C
#define CLKCTL_CCGR2 0x70
#define CLKCTL_CCGR3 0x74
#define CLKCTL_CCGR4 0x78
#define CLKCTL_CCGR5 0x7C
#define CLKCTL_CCGR6 0x80
#if defined(CONFIG_MX53)
#define CLKCTL_CCGR7 0x84
#define CLKCTL_CMEOR 0x88
#elif defined(CONFIG_MX51)
#define CLKCTL_CMEOR 0x84
#endif
/* DPLL */
#define PLL_DP_CTL 0x00
#define PLL_DP_CONFIG 0x04
#define PLL_DP_OP 0x08
#define PLL_DP_MFD 0x0C
#define PLL_DP_MFN 0x10
#define PLL_DP_HFS_OP 0x1C
#define PLL_DP_HFS_MFD 0x20
#define PLL_DP_HFS_MFN 0x24
......@@ -317,9 +317,27 @@ struct clkctl {
u32 ccgr4;
u32 ccgr5;
u32 ccgr6;
#if defined(CONFIG_MX53)
u32 ccgr7;
#endif
u32 cmeor;
};
/* DPLL registers */
struct dpll {
u32 dp_ctl;
u32 dp_config;
u32 dp_op;
u32 dp_mfd;
u32 dp_mfn;
u32 dp_mfn_minus;
u32 dp_mfn_plus;
u32 dp_hfs_op;
u32 dp_hfs_mfd;
u32 dp_hfs_mfn;
u32 dp_mfn_togc;
u32 dp_destat;
};
/* WEIM registers */
struct weim {
u32 cs0gcr1;
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment