Commit 1d0350ed authored by wdenk's avatar wdenk
Browse files

* Patch by Jim Sandoz, 07 Nov 2002:

  Increase number of network RX buffers (PKTBUFSRX in
  "include/net.h") for EEPRO100 based boards (especially SP8240)
  which showed "Receiver is not ready" errors when U-Boot was
  processing the receive buffers slower than the network controller
  was filling them.

* Get rid of obsolete include/mpc74xx.h
parent eb9401e3
......@@ -2,6 +2,13 @@
Changes since for U-Boot 0.1.0:
======================================================================
* Patch by Jim Sandoz, 07 Nov 2002:
Increase number of network RX buffers (PKTBUFSRX in
"include/net.h") for EEPRO100 based boards (especially SP8240)
which showed "Receiver is not ready" errors when U-Boot was
processing the receive buffers slower than the network controller
was filling them.
* Patch by Andreas Oberritter, 09 Nov 2002:
Change behaviour of NetLoop(): return -1 for errors, filesize
otherwise; return code 0 is valid an means no file loaded - in this
......
#include <config.h>
#include <mpc74xx.h>
#include <74xx_7xx.h>
#include <version.h>
#include <ppc_asm.tmpl>
......
......@@ -29,6 +29,9 @@
#include <mpc8260.h>
#include <mpc8260_irq.h>
#include <asm/processor.h>
#ifdef CONFIG_STATUS_LED
#include <status_led.h>
#endif
/****************************************************************************/
......@@ -292,7 +295,7 @@ void timer_interrupt (struct pt_regs *regs)
{
#if defined(CONFIG_WATCHDOG) || defined(CFG_HYMOD_DBLEDS)
volatile immap_t *immr = (immap_t *) CFG_IMMR;
#endif /* CONFIG_WATCHDOG */
#endif /* CONFIG_WATCHDOG */
/* Restore Decrementer Count */
set_dec (decrementer_count);
......@@ -306,19 +309,19 @@ void timer_interrupt (struct pt_regs *regs)
if ((timestamp % CFG_HZ) == 0) {
#if defined(CFG_CMA_LCD_HEARTBEAT)
extern void lcd_heartbeat (void);
#endif /* CFG_CMA_LCD_HEARTBEAT */
#endif /* CFG_CMA_LCD_HEARTBEAT */
#if defined(CFG_HYMOD_DBLEDS)
volatile iop8260_t *iop = &immr->im_ioport;
static int shift = 0;
#endif /* CFG_HYMOD_DBLEDS */
#endif /* CFG_HYMOD_DBLEDS */
#if defined(CFG_CMA_LCD_HEARTBEAT)
lcd_heartbeat ();
#endif /* CFG_CMA_LCD_HEARTBEAT */
#endif /* CFG_CMA_LCD_HEARTBEAT */
#if defined(CONFIG_WATCHDOG)
reset_8260_watchdog (immr);
#endif /* CONFIG_WATCHDOG */
#endif /* CONFIG_WATCHDOG */
#if defined(CFG_HYMOD_DBLEDS)
/* hymod daughter board LEDs */
......@@ -326,9 +329,13 @@ void timer_interrupt (struct pt_regs *regs)
shift = 0;
iop->iop_pdatd =
(iop->iop_pdatd & ~0x0f000000) | (1 << (24 + shift));
#endif /* CFG_HYMOD_DBLEDS */
#endif /* CFG_HYMOD_DBLEDS */
}
#endif /* CONFIG_WATCHDOG || CFG_CMA_LCD_HEARTBEAT */
#endif /* CONFIG_WATCHDOG || CFG_CMA_LCD_HEARTBEAT */
#ifdef CONFIG_STATUS_LED
status_led_tick (timestamp);
#endif /* CONFIG_STATUS_LED */
}
/****************************************************************************/
......
......@@ -90,6 +90,7 @@ setdcr 6 # IBM 4XX DCR registers
setenv 6
smcinfo 3
spiinfo 3
sspi 4
stack 5
step 4
tftpboot 4
......
......@@ -76,6 +76,7 @@
#define CFG_CMD_HWFLOW 0x0000020000000000 /* RTS/CTS hw flow control */
#define CFG_CMD_SAVES 0x0000040000000000 /* save S record dump */
#define CFG_CMD_VFD 0x0000080000000000 /* Display bitmap on VFD display*/
#define CFG_CMD_SPI 0x0000100000000000 /* SPI utility */
#define CFG_CMD_ALL 0xFFFFFFFFFFFFFFFF /* ALL commands */
......@@ -110,7 +111,8 @@
CFG_CMD_SCSI | \
CFG_CMD_SDRAM | \
CFG_CMD_USB | \
CFG_CMD_VFD )
CFG_CMD_VFD | \
CFG_CMD_SPI )
/* Default configuration
*/
......
......@@ -38,7 +38,7 @@
<dout> - Hexadecimal string that gets sent\n" \
),
int do_spi (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]);
int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
#else
#define CMD_TBL_SPI
......
......@@ -310,7 +310,7 @@
/*
* L2CR setup -- make sure this is right for your board!
* look in include/mpc74xx.h for the defines used here
* look in include/74xx_7xx.h for the defines used here
*/
#define CFG_L2
......
......@@ -400,7 +400,7 @@
/*-----------------------------------------------------------------------
* L2CR setup -- make sure this is right for your board!
* look in include/mpc74xx.h for the defines used here
* look in include/74xx_7xx.h for the defines used here
*/
#define CFG_L2
......
......@@ -100,6 +100,7 @@
& ~CFG_CMD_PCI \
& ~CFG_CMD_PCMCIA \
& ~CFG_CMD_SCSI \
& ~CFG_CMD_SPI \
& ~CFG_CMD_USB \
& ~CFG_CMD_VFD )
......
......@@ -120,6 +120,7 @@
CFG_CMD_PCI | \
CFG_CMD_PCMCIA | \
CFG_CMD_SCSI | \
CFG_CMD_SPI | \
CFG_CMD_VFD | \
CFG_CMD_USB ) )
......
......@@ -344,7 +344,7 @@
/*-----------------------------------------------------------------------
* L2CR setup -- make sure this is right for your board!
* look in include/mpc74xx.h for the defines used here
* look in include/74xx_7xx.h for the defines used here
*/
#define CFG_L2
......
......@@ -284,6 +284,7 @@
~CFG_CMD_PCI & \
~CFG_CMD_PCMCIA & \
~CFG_CMD_SCSI & \
~CFG_CMD_SPI & \
~CFG_CMD_USB & \
~CFG_CMD_VFD & \
~CFG_CMD_DTT )
......
......@@ -149,6 +149,7 @@
CFG_CMD_PCI | \
CFG_CMD_USB | \
CFG_CMD_SCSI | \
CFG_CMD_SPI | \
CFG_CMD_VFD | \
CFG_CMD_DTT ) )
......
......@@ -252,10 +252,12 @@
/*
* select SPI support configuration
* Select SPI support configuration
*/
#define CONFIG_SOFT_SPI /* enable SPI driver */
#define CONFIG_SOFT_SPI /* Enable SPI driver */
#define MAX_SPI_BYTES 4 /* Maximum number of bytes we can handle */
#undef DEBUG_SPI /* Disable SPI debugging */
/*
* Software (bit-bang) SPI driver configuration
*/
......@@ -274,7 +276,7 @@
else immr->im_ioport.iop_pdatd &= ~I2C_MOSI
#define SPI_SCL(bit) if(bit) immr->im_ioport.iop_pdatd |= I2C_SCLK; \
else immr->im_ioport.iop_pdatd &= ~I2C_SCLK
#define SPI_DELAY /*udelay(1)*/ /* 1/2 SPI clock duration */
#define SPI_DELAY /* No delay is needed */
#endif /* CONFIG_SOFT_SPI */
......@@ -485,6 +487,11 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
/* When CONFIG_TIMESTAMP is selected, the timestamp (date and time)
* of an image is printed by image commands like bootm or iminfo.
*/
#define CONFIG_TIMESTAMP
/* What U-Boot subsytems do you want enabled? */
#ifdef CONFIG_ETHER_ON_FCC
# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
......@@ -544,6 +551,7 @@
#define CFG_LOAD_ADDR 0x400000 /* default load address */
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CFG_ALT_MEMTEST /* Select full-featured memory test */
#define CFG_MEMTEST_START 0x2000 /* memtest works from the end of */
/* the exception vector table */
/* to the end of the DRAM */
......
......@@ -294,9 +294,7 @@
* is on the board edge side of both the LED strip and the DS0-DS7
* switch.
*/
#if 0
# define CONFIG_MISC_INIT_R
#endif
#undef CONFIG_MISC_INIT_R
/* Set to a positive value to delay for running BOOTCOMMAND */
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
......@@ -312,6 +310,43 @@
# define DEBUG_BOOTKEYS 0
#endif
/* Define this to contain any number of null terminated strings that
* will be part of the default enviroment compiled into the boot image.
*/
#define CONFIG_EXTRA_ENV_SETTINGS \
"serverip=192.168.123.201\0" \
"ipaddr=192.168.123.203\0" \
"reprog="\
"tftpboot 0x140000 /bdi2000/u-boot.bin; " \
"protect off 1:0; " \
"erase 1:0; " \
"cp.b 140000 40000000 $(filesize); " \
"protect on 1:0\0" \
"zapenv="\
"protect off 1:1; " \
"erase 1:1; " \
"protect on 1:1\0" \
"root-on-initrd="\
"setenv bootcmd "\
"version;" \
"echo;" \
"bootp;" \
"setenv bootargs root=/dev/ram0 rw " \
"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \
"run boot-hook;" \
"bootm\0" \
"root-on-nfs="\
"setenv bootcmd "\
"version;" \
"echo;" \
"bootp;" \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$(serverip):$(rootpath) " \
"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\\;" \
"run boot-hook;" \
"bootm\0" \
"boot-hook=echo boot-hook\0"
/* Define a command string that is automatically executed when no character
* is read on the console interface withing "Boot Delay" after reset.
*/
......@@ -352,6 +387,16 @@
/* Monitor Command Prompt */
#define CFG_PROMPT "=> "
#undef CFG_HUSH_PARSER
#ifdef CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
/* When CONFIG_TIMESTAMP is selected, the timestamp (date and time)
* of an image is printed by image commands like bootm or iminfo.
*/
#define CONFIG_TIMESTAMP
/* What U-Boot subsytems do you want enabled? */
#ifdef CONFIG_ETHER_ON_FCC
# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
......@@ -405,9 +450,10 @@
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_LOAD_ADDR 0x140000 /* default load address */
#define CFG_LOAD_ADDR 0x400000 /* default load address */
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CFG_ALT_MEMTEST /* Select full-featured memory test */
#define CFG_MEMTEST_START 0x2000 /* memtest works from the end of */
/* the exception vector table */
/* to the end of the DRAM */
......
......@@ -39,7 +39,7 @@ void *ListGetPtrToItem(list_t list, int itemPosition);
void ListRemoveItem(list_t list, void *itemDestination, int itemPosition);
void ListRemoveItems(list_t list, void *itemsDestination, int firstItemPosition, int numItemsToRemove);
#if 0
#if 0 /* rarely ever used; kept here for reference just in case ... */
void ListDisposePtrList(list_t list);
void ListGetItem(list_t list, void *itemDestination, int itemPosition);
void ListReplaceItem(list_t list, void *ptrToItem, int itemPosition);
......@@ -72,6 +72,6 @@ int ListGetItemSize(list_t list);
int GetIntListFromParmInfo(va_list parmInfo, int numIntegers, list_t *integerList);
int ListInsertAfterItem(list_t list, void *ptrToItem, void *ptrToItemToInsertAfter, CompareFunction compareFunction);
int ListInsertBeforeItem(list_t list, void *ptrToItem, void *ptrToItemToInsertBefore, CompareFunction compareFunction);
#endif 0
#endif /* 0 */
#endif /* _LISTS_H_ */
/*
* (C) Copyright 2001
* Josh Huber, Mission Critical Linux, Inc. <huber@mclx.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* mpc74xx.h
*
* MPC74xx specific definitions
*/
#ifndef __MPC74XX_H__
#define __MPC74XX_H__
/*----------------------------------------------------------------
* Exception offsets (PowerPC standard)
*/
#define EXC_OFF_SYS_RESET 0x0100 /* default system reset offset */
/*----------------------------------------------------------------
* l2cr values
*/
#define l2cr 1017
#define L2CR_L2E 0x80000000 /* bit 0 - enable */
#define L2CR_L2PE 0x40000000 /* bit 1 - data parity */
#define L2CR_L2SIZ_2M 0x00000000 /* bits 2-3 - 2MB, MPC7400 only! */
#define L2CR_L2SIZ_1M 0x30000000 /* ... 1MB */
#define L2CR_L2SIZ_HM 0x20000000 /* ... 512K */
#define L2CR_L2SIZ_QM 0x10000000 /* ... 256k */
#define L2CR_L2CLK_1 0x02000000 /* bits 4-6 clock ratio div 1 */
#define L2CR_L2CLK_1_5 0x04000000 /* bits 4-6 clock ratio div 1.5 */
#define L2CR_L2CLK_2 0x08000000 /* bits 4-6 clock ratio div 2 */
#define L2CR_L2CLK_2_5 0x0a000000 /* bits 4-6 clock ratio div 2.5 */
#define L2CR_L2CLK_3 0x0c000000 /* bits 4-6 clock ratio div 3 */
#define L2CR_L2CLK_3_5 0x06000000 /* bits 4-6 clock ratio div 3.5 */
#define L2CR_L2CLK_4 0x0e000000 /* bits 4-6 clock ratio div 4 */
#define L2CR_L2RAM_BURST 0x01000000 /* bits 7-8 - burst SRAM */
#define L2CR_DO 0x00400000 /* bit 9 - enable caching of instr. in L2 */
#define L2CR_L2I 0x00200000 /* bit 10 - global invalidate bit */
#define L2CR_L2CTL 0x00100000 /* bit 11 - l2 ram control */
#define L2CR_L2WT 0x00080000 /* bit 12 - l2 write-through */
#define L2CR_TS 0x00040000 /* bit 13 - test support on */
#define L2CR_TS_OFF -L2CR_TS /* bit 13 - test support off */
#define L2CR_L2OH_5 0x00000000 /* bits 14-15 - output hold time = short */
#define L2CR_L2OH_1 0x00010000 /* bits 14-15 - output hold time = medium */
#define L2CR_L2OH_INV 0x00020000 /* bits 14-15 - output hold time = long */
#define L2CR_L2IP 0x00000001 /* global invalidate in progress */
/*----------------------------------------------------------------
* BAT settings. Look in config_<BOARD>.h for the actual setup
*/
#define BATU_BL_128K 0x00000000
#define BATU_BL_256K 0x00000004
#define BATU_BL_512K 0x0000000c
#define BATU_BL_1M 0x0000001c
#define BATU_BL_2M 0x0000003c
#define BATU_BL_4M 0x0000007c
#define BATU_BL_8M 0x000000fc
#define BATU_BL_16M 0x000001fc
#define BATU_BL_32M 0x000003fc
#define BATU_BL_64M 0x000007fc
#define BATU_BL_128M 0x00000ffc
#define BATU_BL_256M 0x00001ffc
#define BATU_VS 0x00000002
#define BATU_VP 0x00000001
#define BATU_INVALID 0x00000000
#define BATL_WRITETHROUGH 0x00000040 /* W */
#define BATL_CACHEINHIBIT 0x00000020 /* I */
#define BATL_COHERENT 0x00000010 /* M */
#define BATL_GUARDED 0x00000008 /* G */
#define BATL_NO_ACCESS 0x00000000
#define BATL_RO 0x00000001
#define BATL_RW 0x00000002
#endif /* __MPC74XX_H__ */
......@@ -27,7 +27,12 @@
*
*/
#ifndef CONFIG_EEPRO100
#define PKTBUFSRX 4
#else
#define PKTBUFSRX 8
#endif
#define PKTALIGN 32
typedef ulong IPaddr_t;
......
......@@ -187,7 +187,7 @@ restart:
switch (net_check_prereq (protocol)) {
case 1:
/* network not configured */
return 0;
return (-1);
#ifdef CONFIG_NET_MULTI
case 2:
......@@ -257,7 +257,7 @@ restart:
if (ctrlc()) {
eth_halt();
printf("\nAbort\n");
return 0;
return (-1);
}
......@@ -295,7 +295,7 @@ restart:
return NetBootFileXferSize;
case NETLOOP_FAIL:
return 0;
return (-1);
}
}
}
......
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