arm: dts: ls1028a: enable the switch CPU port for the LS1028A-QDS

Due to an upstream change, the ls1028a.dtsi bindings for the mscc_felix
switch got accepted with all ports disabled by default and with no link
to the DSA master - this needs to be done on a per board basis.

Note that enetc-2 is not currently disabled in the ls1028a.dtsi, but
presumably at some point it might become. Explicitly enable it in the
QDS device trees anyway, to proactively avoid issues when that happens.

Fixes: a7fdac7e ("arm: dts: ls1028a: define QDS networking protocol combinations")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>

arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi

@@ -20,6 +20,10 @@
 #include "fsl-sch-30841.dtsi"
 };
 
+&enetc2 {
+	status = "okay";
+};
+
 &mscc_felix {
 	status = "okay";
 };
@@ -47,3 +51,8 @@
 	phy-mode = "sgmii-2500";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
 };
+
+&mscc_felix_port4 {
+	ethernet = <&enetc2>;
+	status = "okay";
+};

arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi

@@ -9,6 +9,10 @@
 #include "fsl-sch-30841.dtsi"
 };
 
+&enetc2 {
+	status = "okay";
+};
+
 &mscc_felix {
 	status = "okay";
 };
@@ -24,3 +28,8 @@
 	phy-mode = "sgmii-2500";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
 };
+
+&mscc_felix_port4 {
+	ethernet = <&enetc2>;
+	status = "okay";
+};

arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi

@@ -34,6 +34,10 @@
 	#include "fsl-sch-24801.dtsi"
 };
 
+&enetc2 {
+	status = "okay";
+};
+
 &mscc_felix {
 	status = "okay";
 };
@@ -61,3 +65,8 @@
 	phy-mode = "sgmii";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
 };
+
+&mscc_felix_port4 {
+	ethernet = <&enetc2>;
+	status = "okay";
+};

arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi

@@ -19,6 +19,10 @@
 	#include "fsl-sch-24801.dtsi"
 };
 
+&enetc2 {
+	status = "okay";
+};
+
 &mscc_felix {
 	status = "okay";
 };
@@ -46,3 +50,8 @@
 	phy-mode = "sgmii";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
 };
+
+&mscc_felix_port4 {
+	ethernet = <&enetc2>;
+	status = "okay";
+};

arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi

@@ -19,6 +19,10 @@
 #include "fsl-sch-30841.dtsi"
 };
 
+&enetc2 {
+	status = "okay";
+};
+
 &mscc_felix {
 	status = "okay";
 };
@@ -46,3 +50,8 @@
 	phy-mode = "usxgmii";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@03}>;
 };
+
+&mscc_felix_port4 {
+	ethernet = <&enetc2>;
+	status = "okay";
+};

arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi

@@ -13,6 +13,10 @@
 	#include "fsl-sch-28021.dtsi"
 };
 
+&enetc2 {
+	status = "okay";
+};
+
 &mscc_felix {
 	status = "okay";
 };
@@ -40,3 +44,8 @@
 	phy-mode = "qsgmii";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0b}>;
 };
+
+&mscc_felix_port4 {
+	ethernet = <&enetc2>;
+	status = "okay";
+};

arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi

@@ -9,6 +9,10 @@
 #include "fsl-sch-30842.dtsi"
 };
 
+&enetc2 {
+	status = "okay";
+};
+
 &mscc_felix {
 	status = "okay";
 };
@@ -18,3 +22,8 @@
 	phy-mode = "sgmii-2500";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
 };
+
+&mscc_felix_port4 {
+	ethernet = <&enetc2>;
+	status = "okay";
+};

arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi

@@ -9,6 +9,10 @@
 #include "fsl-sch-30842.dtsi"
 };
 
+&enetc2 {
+	status = "okay";
+};
+
 &mscc_felix {
 	status = "okay";
 };
@@ -18,3 +22,8 @@
 	phy-mode = "sgmii-2500";
 	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@60/phy@02}>;
 };
+
+&mscc_felix_port4 {
+	ethernet = <&enetc2>;
+	status = "okay";
+};