Commit 4a6fd34b authored by wdenk's avatar wdenk
Browse files

* Patch by Lutz Dennig, 10 Apr 2003:

  Update for R360MPI board

* Add new meaning to "autostart" environment variable:
  If set to "no", a standalone image passed to the
  "bootm" command will be copied to the load address
  (and eventually uncompressed), but NOT be started.
  This can be used to load and uncompress arbitrary
  data.

* Set max brightness for MN11236 displays on TRAB board
parent 69f8f827
......@@ -2,11 +2,23 @@
Changes since U-Boot 0.3.0:
======================================================================
* Patch by Lutz Dennig, 10 Apr 2003:
Update for R360MPI board
* Add new meaning to "autostart" environment variable:
If set to "no", a standalone image passed to the
"bootm" command will be copied to the load address
(and eventually uncompressed), but NOT be started.
This can be used to load and uncompress arbitrary
data.
* Patch by Stefan Roese, 10 Apr 2003:
Changed DHCP client to use ip address from server option field #54
from the OFFER-paket in the server option field #54 in the REQUEST-
paket. This fixes a problem using a Windows 2000 DHCP server, where
the DHCP-server is not the TFTP-server.
Changed DHCP client to use IP address from server option field #54
from the OFFER packet in the server option field #54 in the REQUEST
packet. This fixes a problem using a Windows 2000 DHCP server,
where the DHCP-server is not the TFTP-server.
* Set max brightness for MN11236 displays on TRAB board
* Add support for TQM862L modules
......
......@@ -1918,6 +1918,12 @@ Some configuration options can be set using Environment Variables:
be automatically started (by internally calling
"bootm")
If set to "no", a standalone image passed to the
"bootm" command will be copied to the load address
(and eventually uncompressed), but NOT be started.
This can be used to load and uncompress arbitrary
data.
initrd_high - restrict positioning of initrd images:
If this variable is not set, initrd images will be
copied to the highest possible address in RAM; this
......
......@@ -126,12 +126,12 @@ long int initdram (int board_type)
memctl->memc_mar = 0x00000088;
/*
* Map controller bank 1 to the SDRAM bank at
* Map controller bank 2 to the SDRAM bank at
* preliminary address - these have to be modified after the
* SDRAM size has been determined.
*/
memctl->memc_or1 = CFG_OR1_PRELIM;
memctl->memc_br1 = CFG_BR1_PRELIM;
memctl->memc_or2 = CFG_OR2_PRELIM;
memctl->memc_br2 = CFG_BR2_PRELIM;
memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
......@@ -139,9 +139,9 @@ long int initdram (int board_type)
/* perform SDRAM initializsation sequence */
memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */
udelay (200);
memctl->memc_mcr = 0x80002230; /* SDRAM bank 0 - execute twice */
memctl->memc_mcr = 0x80004230; /* SDRAM bank 0 - execute twice */
udelay (200);
memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
......@@ -153,7 +153,7 @@ long int initdram (int board_type)
*
* try 8 column mode
*/
size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE1_PRELIM,
size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE2_PRELIM,
SDRAM_MAX_SIZE);
udelay (1000);
......@@ -161,13 +161,13 @@ long int initdram (int board_type)
/*
* try 9 column mode
*/
size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE1_PRELIM,
size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE2_PRELIM,
SDRAM_MAX_SIZE);
if (size8 < size9) { /* leave configuration at 9 columns */
size_b0 = size9;
/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
} else { /* back to 8 columns */
} else { /* back to 8 columns */
size_b0 = size8;
memctl->memc_mamr = CFG_MAMR_8COL;
udelay (500);
......@@ -200,6 +200,47 @@ long int initdram (int board_type)
udelay (10000);
#ifdef CONFIG_CAN_DRIVER
/* Initialize OR3 / BR3 */
memctl->memc_or3 = CFG_OR3_CAN; /* switch GPLB_5 to GPLA_5 */
memctl->memc_br3 = CFG_BR3_CAN;
/* Initialize MBMR */
memctl->memc_mbmr = MAMR_GPL_B4DIS; /* GPL_B4 works as UPWAITB */
/* Initialize UPMB for CAN: single read */
memctl->memc_mdr = 0xFFFFC004;
memctl->memc_mcr = 0x0100 | UPMB;
memctl->memc_mdr = 0x0FFFD004;
memctl->memc_mcr = 0x0101 | UPMB;
memctl->memc_mdr = 0x0FFFC000;
memctl->memc_mcr = 0x0102 | UPMB;
memctl->memc_mdr = 0x3FFFC004;
memctl->memc_mcr = 0x0103 | UPMB;
memctl->memc_mdr = 0xFFFFDC05;
memctl->memc_mcr = 0x0104 | UPMB;
/* Initialize UPMB for CAN: single write */
memctl->memc_mdr = 0xFFFCC004;
memctl->memc_mcr = 0x0118 | UPMB;
memctl->memc_mdr = 0xCFFCD004;
memctl->memc_mcr = 0x0119 | UPMB;
memctl->memc_mdr = 0x0FFCC000;
memctl->memc_mcr = 0x011A | UPMB;
memctl->memc_mdr = 0x7FFCC004;
memctl->memc_mcr = 0x011B | UPMB;
memctl->memc_mdr = 0xFFFDCC05;
memctl->memc_mcr = 0x011C | UPMB;
#endif
return (size_b0);
}
......@@ -213,8 +254,8 @@ long int initdram (int board_type)
* - short between data lines
*/
static long int dram_size (long int mamr_value, long int *base,
long int maxsize)
static long int dram_size (long int mamr_value,
long int *base, long int maxsize)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
......@@ -257,10 +298,10 @@ static long int dram_size (long int mamr_value, long int *base,
/* ------------------------------------------------------------------------- */
void r360_pwm_write (uchar reg, uchar val)
void r360_i2c_lcd_write (uchar data0, uchar data1)
{
if (i2c_write (CFG_I2C_PWM_ADDR, reg, 1, &val, 1)) {
printf ("Can't write PWM register 0x%02X.\n", reg);
if (i2c_write (CFG_I2C_LCD_ADDR, data0, 1, &data1, 1)) {
printf("Can't write lcd data 0x%02X 0x%02X.\n", data0, data1);
}
}
......@@ -271,10 +312,8 @@ void r360_pwm_write (uchar reg, uchar val)
*/
/* Number of bytes returned from Keyboard Controller */
#define KEYBD_KEY_MAX 20 /* maximum key number */
#define KEYBD_DATALEN ((KEYBD_KEY_MAX + 7) / 8) /* normal key scan data */
static uchar kbd_addr = CFG_I2C_KBD_ADDR;
#define KEYBD_KEY_MAX 16 /* maximum key number */
#define KEYBD_DATALEN ((KEYBD_KEY_MAX + 7) / 8) /* normal key scan data */
static uchar *key_match (uchar *);
......@@ -287,14 +326,14 @@ int misc_init_r (void)
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
i2c_read (CFG_I2C_KEY_ADDR, 0, 0, kbd_data, KEYBD_DATALEN);
for (i = 0; i < KEYBD_DATALEN; ++i) {
sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
}
setenv ("keybd", keybd_env);
str = strdup (key_match (kbd_data)); /* decode keys */
str = strdup (key_match (keybd_env)); /* decode keys */
#ifdef CONFIG_PREBOOT /* automatically configure "preboot" command on key match */
setenv ("preboot", str); /* set or delete definition */
......@@ -324,16 +363,13 @@ int misc_init_r (void)
static uchar kbd_magic_prefix[] = "key_magic";
static uchar kbd_command_prefix[] = "key_cmd";
static uchar *key_match (uchar * kbd_data)
static uchar *key_match (uchar * kbd_str)
{
uchar compare[KEYBD_DATALEN];
uchar magic[sizeof (kbd_magic_prefix) + 1];
uchar cmd_name[sizeof (kbd_command_prefix) + 1];
uchar key_mask;
uchar *str, *nxt, *suffix;
uchar *str, *suffix;
uchar *kbd_magic_keys;
char *cmd;
int i;
/*
* The following string defines the characters that can pe appended
......@@ -343,62 +379,48 @@ static uchar *key_match (uchar * kbd_data)
* "key_magic" is checked (old behaviour); the string "125" causes
* checks for "key_magic1", "key_magic2" and "key_magic5", etc.
*/
if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
kbd_magic_keys = "";
if ((kbd_magic_keys = getenv ("magic_keys")) != NULL) {
/* loop over all magic keys;
* use '\0' suffix in case of empty string
*/
for (suffix = kbd_magic_keys;
*suffix || suffix == kbd_magic_keys;
++suffix) {
sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
/* loop over all magic keys;
* use '\0' suffix in case of empty string
*/
for (suffix=kbd_magic_keys; *suffix || suffix==kbd_magic_keys; ++suffix) {
sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
#if 0
printf ("### Check magic \"%s\"\n", magic);
printf ("### Check magic \"%s\"\n", magic);
#endif
memcpy(compare, kbd_data, KEYBD_DATALEN);
for (str = getenv(magic); str != NULL; str = (*nxt) ? nxt+1 : nxt) {
uchar c;
c = (uchar) simple_strtoul (str, (char **) (&nxt), 16);
if (str == nxt) /* invalid character */
break;
if (c >= KEYBD_KEY_MAX) /* bad key number */
goto next_magic;
key_mask = 0x80 >> (c % 8);
if (!(compare[c / 8] & key_mask)) /* key not pressed */
goto next_magic;
if ((str = getenv (magic)) != 0) {
compare[c / 8] &= ~key_mask;
}
for (i=0; i<KEYBD_DATALEN; i++)
if (compare[i]) /* key(s) not released */
goto next_magic;
sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
cmd = getenv (cmd_name);
#if 0
printf ("### Set PREBOOT to $(%s): \"%s\"\n",
cmd_name, cmd ? cmd : "<<NULL>>");
printf ("### Compare \"%s\" \"%s\"\n",
kbd_str, str);
#endif
*kbd_data = *suffix;
return (cmd);
if (strcmp (kbd_str, str) == 0) {
sprintf (cmd_name, "%s%c",
kbd_command_prefix,
*suffix);
next_magic:;
if ((cmd = getenv (cmd_name)) != 0) {
#if 0
printf ("### Set PREBOOT to $(%s): \"%s\"\n",
cmd_name, cmd);
#endif
return (cmd);
}
}
}
}
}
#if 0
printf ("### Delete PREBOOT\n");
#endif
*kbd_data = '\0';
*kbd_str = '\0';
return (NULL);
}
#endif /* CONFIG_PREBOOT */
#endif /* CONFIG_PREBOOT */
/* Read Keyboard status */
int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
......@@ -410,7 +432,7 @@ int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
/* Read keys */
i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
i2c_read (CFG_I2C_KEY_ADDR, 0, 0, kbd_data, KEYBD_DATALEN);
puts ("Keys:");
for (i = 0; i < KEYBD_DATALEN; ++i) {
......
......@@ -486,7 +486,11 @@ int drv_vfd_init(void)
/* frame buffer endadr */
rLCDSADDR2 = (gd->fb_base + FRAME_BUF_SIZE) >> 1;
rLCDSADDR3 = ((256/4));
rLCDCON2 = 0x000DC000;
rLCDCON2 = 0x000DC000;
if(gd->vfd_type == VFD_TYPE_MN11236)
rLCDCON2 = 37 << 14; /* MN11236: 38 lines */
else
rLCDCON2 = 55 << 14; /* T119C: 56 lines */
rLCDCON3 = 0x0051000A;
rLCDCON4 = 0x00000001;
if (gd->vfd_type && vfd_inv_data)
......
......@@ -287,12 +287,17 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
switch (hdr->ih_type) {
case IH_TYPE_STANDALONE:
appl = (int (*)(cmd_tbl_t *, int, int, char *[]))ntohl(hdr->ih_ep);
if (iflag)
enable_interrupts();
/* load (and uncompress), but don't start if "autostart"
* is set to "no"
*/
if (((s = getenv("autostart")) != NULL) && (strcmp(s,"no") == 0))
return 0;
appl = (int (*)(cmd_tbl_t *, int, int, char *[]))ntohl(hdr->ih_ep);
(*appl)(cmdtp, flag, argc-1, &argv[1]);
break;
return 0;
case IH_TYPE_KERNEL:
case IH_TYPE_MULTI:
/* handled below */
......
......@@ -177,6 +177,8 @@ static vidinfo_t panel_info = {
/*
* Sharp LQ057Q3DC02 display. Active, color, single scan.
*/
#define LCD_DF 12
static vidinfo_t panel_info = {
320, 240, 0, 0, CFG_HIGH, CFG_HIGH, CFG_LOW, CFG_LOW, CFG_HIGH,
3, 0, 0, 1, 1, 15, 4, 0, 3
......@@ -260,11 +262,11 @@ static vidinfo_t panel_info = {
* Emerging Display Technologies 320x240. Passive, monochrome, single scan.
*/
#define LCD_BPP LCD_MONOCHROME
#define LCD_DF 20
#define LCD_DF 10
static vidinfo_t panel_info = {
320, 240, 0, 0, CFG_HIGH, CFG_HIGH, CFG_HIGH, CFG_HIGH, CFG_LOW,
LCD_BPP, 0, 0, 0, 0, 0, 15, 0, 0
LCD_BPP, 0, 0, 0, 0, 33, 0, 0, 0
};
#endif
/*----------------------------------------------------------------------*/
......@@ -977,15 +979,18 @@ static void lcd_enable (void)
c |= 0x07; /* Power on CCFL, Enable CCFL, Chip Enable LCD */
pic_write (0x60, c);
}
#elif defined(CONFIG_R360MPI)
#endif /* CONFIG_LWMON */
#if defined(CONFIG_R360MPI)
{
extern void r360_pwm_write (uchar reg, uchar val);
extern void r360_i2c_lcd_write (uchar data0, uchar data1);
r360_pwm_write(8, 1);
r360_pwm_write(0, 4);
r360_pwm_write(1, 6);
r360_i2c_lcd_write(0x10, 0x01);
r360_i2c_lcd_write(0x20, 0x01);
r360_i2c_lcd_write(0x3F, 0xFF);
r360_i2c_lcd_write(0x47, 0xFF);
}
#endif /* CONFIG_LWMON */
#endif /* CONFIG_R360MPI */
}
/*----------------------------------------------------------------------*/
......@@ -1003,10 +1008,12 @@ static void lcd_disable (void)
}
#elif defined(CONFIG_R360MPI)
{
extern void r360_pwm_write (uchar reg, uchar val);
extern void r360_i2c_lcd_write (uchar data0, uchar data1);
r360_pwm_write(0, 0);
r360_pwm_write(1, 0);
r360_i2c_lcd_write(0x10, 0x00);
r360_i2c_lcd_write(0x20, 0x00);
r360_i2c_lcd_write(0x30, 0x00);
r360_i2c_lcd_write(0x40, 0x00);
}
#endif /* CONFIG_LWMON */
/* Disable the LCD panel */
......
......@@ -47,7 +47,7 @@
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_BAUDRATE 9600 /* console baudrate = 9600bps */
#define CONFIG_BAUDRATE 115200 /* console baudrate in bps */
#if 0
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
#else
......@@ -83,7 +83,7 @@
#endif /* CONFIG_LCD */
#endif
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
#define CONFIG_CAN_DRIVER /* CAN Driver support enabled */
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
......@@ -113,9 +113,9 @@
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(50)
#define CFG_I2C_PWM_ADDR 0x58 /* Power management coprocessor */
#define CFG_I2C_KBD_ADDR 0x50 /* Keyboard coprocessor */
#define CFG_I2C_TERM_ADDR 0x49 /* Temperature Sensors */
#define CFG_I2C_LCD_ADDR 0x8 /* LCD Control */
#define CFG_I2C_KEY_ADDR 0x9 /* Keyboard coprocessor */
#define CFG_I2C_TEM_ADDR 0x49 /* Temperature Sensors */
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
CFG_CMD_DHCP | \
......@@ -232,11 +232,7 @@
*-----------------------------------------------------------------------
* PCMCIA config., multi-function pin tri-state
*/
#ifndef CONFIG_CAN_DRIVER
#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
#else /* we must activate GPL5 in the SIUMCR for CAN */
#define CFG_SIUMCR (SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
#endif /* CONFIG_CAN_DRIVER */
/*-----------------------------------------------------------------------
* TBSCR - Time Base Status and Control 11-26
......@@ -362,20 +358,31 @@
/*
* BR1 and OR1 (SDRAM)
* BR2 and OR2 (SDRAM)
*
*/
#define SDRAM_BASE1_PRELIM 0x00000000 /* SDRAM bank #0 */
#define SDRAM_BASE2_PRELIM 0x00000000 /* SDRAM bank #0 */
#define SDRAM_MAX_SIZE 0x04000000 /* max 64 MB per bank */
#define CFG_PRELIM_OR1_AM 0xF8000000 /* OR addr mask */
#define CFG_PRELIM_OR2_AM 0xF8000000 /* OR addr mask */
/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care) */
#define CFG_OR_TIMING_SDRAM (OR_ACS_DIV1 | OR_CSNT_SAM | \
OR_SCY_0_CLK | OR_G5LS)
#define CFG_OR1_PRELIM (CFG_PRELIM_OR1_AM | CFG_OR_TIMING_SDRAM )
#define CFG_BR1_PRELIM ((SDRAM_BASE1_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
#define CFG_OR2_PRELIM (CFG_PRELIM_OR2_AM | CFG_OR_TIMING_SDRAM )
#define CFG_BR2_PRELIM ((SDRAM_BASE2_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
/*
* BR3 and OR3 (CAN Controller)
*/
#ifdef CONFIG_CAN_DRIVER
#define CFG_CAN_BASE 0xC0000000 /* CAN base address */
#define CFG_CAN_OR_AM 0xFFFF8000 /* 32 kB address mask */
#define CFG_OR3_CAN (CFG_CAN_OR_AM | OR_G5LA |OR_BI)
#define CFG_BR3_CAN ((CFG_CAN_BASE & BR_BA_MSK) | \
BR_PS_8 | BR_MS_UPMB | BR_V)
#endif /* CONFIG_CAN_DRIVER */
/*
......
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