Commit 5532e3bb authored by Peter Robinson's avatar Peter Robinson Committed by Kever Yang
Browse files

arm: dts: rockchip: rk3399: Move U-Boot specific bits to rk3399-u-boot



There's some bits in the U-Boot rk3399.dtsi that aren't yet in the
upstream Linux dtsi but are needed for early boot. This moves them
to the u-boot.dtsi to make it easier to sync the rest of rk3399.dtsi
with upstream.
Signed-off-by: default avatarPeter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang's avatarKever Yang <kever.yang@rock-chips.com>
parent 4d08de58
......@@ -2,19 +2,58 @@
/*
* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
*/
#define USB_CLASS_HUB 9
/ {
aliases {
mmc0 = &sdhci;
mmc1 = &sdmmc;
};
cic: syscon@ff620000 {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-cic", "syscon";
reg = <0x0 0xff620000 0x0 0x100>;
};
dfi: dfi@ff630000 {
u-boot,dm-pre-reloc;
reg = <0x00 0xff630000 0x00 0x4000>;
compatible = "rockchip,rk3399-dfi";
rockchip,pmu = <&pmugrf>;
clocks = <&cru PCLK_DDR_MON>;
clock-names = "pclk_ddr_mon";
};
dmc: dmc {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-dmc";
devfreq-events = <&dfi>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru SCLK_DDRCLK>;
clock-names = "dmc_clk";
reg = <0x0 0xffa80000 0x0 0x0800
0x0 0xffa80800 0x0 0x1800
0x0 0xffa82000 0x0 0x2000
0x0 0xffa84000 0x0 0x1000
0x0 0xffa88000 0x0 0x0800
0x0 0xffa88800 0x0 0x1800
0x0 0xffa8a000 0x0 0x2000
0x0 0xffa8c000 0x0 0x1000>;
};
pmusgrf: syscon@ff330000 {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pmusgrf", "syscon";
reg = <0x0 0xff330000 0x0 0xe3d4>;
};
&cic {
u-boot,dm-pre-reloc;
};
&cru {
u-boot,dm-pre-reloc;
};
&dmc {
u-boot,dm-pre-reloc;
};
&grf {
u-boot,dm-pre-reloc;
};
......@@ -39,10 +78,6 @@
u-boot,dm-pre-reloc;
};
&pmusgrf {
u-boot,dm-pre-reloc;
};
&sdhci {
u-boot,dm-pre-reloc;
};
......
......@@ -10,7 +10,6 @@
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/power/rk3399-power.h>
#include <dt-bindings/thermal/thermal.h>
#define USB_CLASS_HUB 9
/ {
compatible = "rockchip,rk3399";
......@@ -34,8 +33,6 @@
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
mmc0 = &sdhci;
mmc1 = &sdmmc;
};
cpus {
......@@ -1080,11 +1077,6 @@
};
};
pmusgrf: syscon@ff330000 {
compatible = "rockchip,rk3399-pmusgrf", "syscon";
reg = <0x0 0xff330000 0x0 0xe3d4>;
};
spi3: spi@ff350000 {
compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi";
reg = <0x0 0xff350000 0x0 0x1000>;
......@@ -1200,36 +1192,6 @@
status = "disabled";
};
cic: syscon@ff620000 {
compatible = "rockchip,rk3399-cic", "syscon";
reg = <0x0 0xff620000 0x0 0x100>;
};
dfi: dfi@ff630000 {
reg = <0x00 0xff630000 0x00 0x4000>;
compatible = "rockchip,rk3399-dfi";
rockchip,pmu = <&pmugrf>;
clocks = <&cru PCLK_DDR_MON>;
clock-names = "pclk_ddr_mon";
status = "disabled";
};
dmc: dmc {
compatible = "rockchip,rk3399-dmc";
devfreq-events = <&dfi>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru SCLK_DDRCLK>;
clock-names = "dmc_clk";
reg = <0x0 0xffa80000 0x0 0x0800
0x0 0xffa80800 0x0 0x1800
0x0 0xffa82000 0x0 0x2000
0x0 0xffa84000 0x0 0x1000
0x0 0xffa88000 0x0 0x0800
0x0 0xffa88800 0x0 0x1800
0x0 0xffa8a000 0x0 0x2000
0x0 0xffa8c000 0x0 0x1000>;
};
efuse0: efuse@ff690000 {
compatible = "rockchip,rk3399-efuse";
reg = <0x0 0xff690000 0x0 0x80>;
......
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