* Patches by Richard Woodruff, 01 Oct 2004:

  add support for the TI OMAP2420 processor and its H4 reference
  board

* Patch by Christian Pellegrin, 24 Sep 2004:
  Added support for NE2000 compatible (DP8390, DP83902) NICs.

CHANGELOG

@@ -2,6 +2,13 @@
 Changes for U-Boot 1.1.3:
 ======================================================================
 
+* Patches by Richard Woodruff, 01 Oct 2004:
+  add support for the TI OMAP2420 processor and its H4 reference
+  board
+
+* Patch by Christian Pellegrin, 24 Sep 2004:
+  Added support for NE2000 compatible (DP8390, DP83902) NICs.
+
 * Patch by Leif Lindholm, 23 Sep 2004:
   add support for the AMD db1550 board
 

MAINTAINERS

@@ -382,6 +382,10 @@ Rishi Bhattacharya <rishi@ti.com>
 
 	omap5912osk		ARM926EJS
 
+Richard Woodruff <r-woodruff2@ti.com>
+	
+	omap2420h4		ARM1136EJS
+
 David Mller <d.mueller@elsoft.ch>
 
 	smdk2410		ARM920T

MAKEALL

@@ -157,6 +157,11 @@ LIST_ARM9="	\
 	versatile							\
 "
 
+#########################################################################
+## ARM11 Systems
+#########################################################################
+LIST_ARM11="omap2420h4"
+
 #########################################################################
 ## Xscale Systems
 #########################################################################
@@ -170,7 +175,11 @@ LIST_pxa="	\
 LIST_ixp="ixdp425"
 
 
-LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_pxa} ${LIST_ixp}"
+LIST_arm="	\
+	${LIST_SA}							\
+	${LIST_ARM7} ${LIST_ARM9} ${LIST_ARM11}				\
+	${LIST_pxa} ${LIST_ixp}						\
+"
 
 #########################################################################
 ## MIPS Systems
@@ -238,7 +247,7 @@ for arg in $@
 do
 	case "$arg" in
 	ppc|5xx|5xxx|8xx|8220|824x|8260|85xx|4xx|7xx|74xx| \
-	arm|SA|ARM7|ARM9|pxa|ixp| \
+	arm|SA|ARM7|ARM9|ARM11|pxa|ixp| \
 	microblaze| \
 	mips| \
 	nios|nios2| \

Makefile

@@ -1403,6 +1403,12 @@ xm250_config	:	unconfig
 xsengine_config :	unconfig
 	@./mkconfig $(@:_config=) arm pxa xsengine
 
+#########################################################################
+## ARM1136 Systems
+#########################################################################
+omap2420h4_config :    unconfig
+	@./mkconfig $(@:_config=) arm arm1136 omap2420h4
+
 #========================================================================
 # i386
 #========================================================================

README

@@ -130,6 +130,7 @@ Directory Hierarchy:
     - s3c24x0	Files specific to Samsung S3C24X0 CPUs
   - arm925t	Files specific to ARM 925 CPUs
   - arm926ejs	Files specific to ARM 926 CPUs
+  - arm1136	Files specific to ARM 1136 CPUs
   - at91rm9200	Files specific to Atmel AT91RM9200 CPUs
   - i386	Files specific to i386 CPUs
   - ixp		Files specific to Intel XScale IXP CPUs
@@ -301,13 +302,13 @@ The following options need to be configured:
 		ARM based boards:
 		-----------------
 
-		CONFIG_AT91RM9200DK,		CONFIG_CERF250,		CONFIG_DNP1110,
-		CONFIG_EP7312,			CONFIG_H2_OMAP1610,	CONFIG_HHP_CRADLE,
-		CONFIG_IMPA7,		CONFIG_INNOVATOROMAP1510,	CONFIG_INNOVATOROMAP1610,
-		CONFIG_LART,			CONFIG_LPD7A400		CONFIG_LUBBOCK,
-		CONFIG_OSK_OMAP5912,		CONFIG_SHANNON,		CONFIG_P2_OMAP730,
-		CONFIG_SMDK2400,		CONFIG_SMDK2410,	CONFIG_TRAB,
-		CONFIG_VCMA9
+		CONFIG_AT91RM9200DK,	CONFIG_CERF250,		CONFIG_DNP1110,
+		CONFIG_EP7312,		CONFIG_H2_OMAP1610,	CONFIG_HHP_CRADLE,
+		CONFIG_IMPA7,		CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610,
+		CONFIG_LART,		CONFIG_LPD7A400		CONFIG_LUBBOCK,
+		CONFIG_OSK_OMAP5912,	CONFIG_OMAP2420H4,	CONFIG_SHANNON,
+		CONFIG_P2_OMAP730,	CONFIG_SMDK2400,	CONFIG_SMDK2410,
+		CONFIG_TRAB,		CONFIG_VCMA9
 
 		MicroBlaze based boards:
 		------------------------
@@ -2177,7 +2178,7 @@ configurations; the following names are supported:
 	FADS850SAR_config	omap1610h2_config	TQM850L_config
 	FADS860T_config		omap1610inn_config	TQM855L_config
 	FPS850L_config		omap5912osk_config	TQM860L_config
-							WALNUT405_config
+				omap2420h4_config	WALNUT405_config
 							Yukon8220_config
 							ZPC1900_config
 

board/omap2420h4/Makefile

+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	:= omap2420h4.o flash.o mem.o sys_info.o
+SOBJS	:= platform.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################

board/omap2420h4/config.mk

+#
+# (C) Copyright 2004
+# Texas Instruments, <www.ti.com>
+#
+# TI H4 board with OMAP2420 (ARM1136) cpu
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# H4 has 1 bank of 32MB or 64MB mDDR-SDRAM on CS0
+# H4 has 1 bank of 32MB or 00MB mDDR-SDRAM on CS1
+# Physical Address:
+# 8000'0000 (bank0)
+# A000/0000 (bank1) ES2 will be configurable
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+
+# For use with external or internal boots.
+# CONFIG_PARTIAL_SRAM must be defined to use this.
+TEXT_BASE = 0x80e80000
+
+# Used with full SRAM boot.
+# This is either with a GP system or a signed boot image.
+# easiest, and safest way to go if you can.
+# Comment out //CONFIG_PARTIAL_SRAM for this one.
+#
+#TEXT_BASE = 0x40280000
+

board/omap2420h4/flash.c

+/*
+ * (C) Copyright 2001
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2001-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2003
+ * Texas Instruments, <www.ti.com>
+ * Kshitij Gupta <Kshitij@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/sizes.h>
+#include <linux/byteorder/swab.h>
+
+#define PHYS_FLASH_SECT_SIZE	SZ_128K
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];	/* info for FLASH chips    */
+
+/* Board support for 1 or 2 flash devices */
+#undef FLASH_PORT_WIDTH32
+#define FLASH_PORT_WIDTH16
+
+#ifdef FLASH_PORT_WIDTH16
+# define FLASH_PORT_WIDTH		ushort
+# define FLASH_PORT_WIDTHV		vu_short
+# define SWAP(x)			__swab16(x)
+#else
+# define FLASH_PORT_WIDTH		ulong
+# define FLASH_PORT_WIDTHV		vu_long
+# define SWAP(x)			__swab32(x)
+#endif
+
+#define FPW	FLASH_PORT_WIDTH
+#define FPWV	FLASH_PORT_WIDTHV
+
+#define mb() __asm__ __volatile__ ("" : : : "memory")
+
+
+/* Flash Organization Structure */
+typedef struct OrgDef {
+	unsigned int sector_number;
+	unsigned int sector_size;
+} OrgDef;
+
+
+/* Flash Organizations */
+OrgDef OrgIntel_28F256L18T[] = {
+	{4, SZ_32K},		/* 4 * 32kBytes sectors */
+	{255, SZ_128K},		/* 255 * 128kBytes sectors */
+};
+
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+unsigned long flash_init (void);
+static ulong flash_get_size (FPW * addr, flash_info_t * info);
+static int write_data (flash_info_t * info, ulong dest, FPW data);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+void inline spin_wheel (void);
+void flash_print_info (flash_info_t * info);
+void flash_unprotect_sectors (FPWV * addr);
+int flash_erase (flash_info_t * info, int s_first, int s_last);
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
+void flash_unlock(flash_info_t * info, int bank);
+int flash_probe(void);
+
+/*-----------------------------------------------------------------------
+ */
+
+/* see if flash is ok */
+int flash_probe(void)
+{
+	return(flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[0]));
+}
+
+unsigned long flash_init (void)
+{
+	int i;
+	ulong size = 0;
+	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+		switch (i) {
+		case 0:
+			flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
+			flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
+			/* to reset the lock bit */
+			flash_unlock(&flash_info[i],i);
+			break;
+		case 1:
+			flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]);
+			flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
+			/* to reset the lock bit */
+			flash_unlock(&flash_info[i],i);
+			break;
+
+		default:
+			panic ("configured too many flash banks!\n");
+			break;
+		}
+		size += flash_info[i].size;
+	}
+
+	/* Protect monitor and environment sectors
+	 */
+	flash_protect (FLAG_PROTECT_SET,
+				   CFG_FLASH_BASE,
+				   CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
+
+	flash_protect (FLAG_PROTECT_SET,
+				   CFG_ENV_ADDR,
+				   CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
+
+	return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_unlock(flash_info_t * info, int bank)
+{
+	int j;
+	if (!bank)
+		j=2;	/* leave 0,1 locked for boot bank */
+	else
+		j=0;	/* get the whole bank for #2 */
+
+	for (;j<CFG_MAX_FLASH_SECT;j++) {
+		FPWV *addr = (FPWV *) (info->start[j]);
+		if (addr == NULL) {
+			printf("Warning Flash probe failed\n");
+			break;
+		}
+		flash_unprotect_sectors (addr);
+		*addr = (FPW) 0x00500050;/* clear status register */
+		*addr = (FPW) 0x00FF00FF;/* resest to read mode */
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t * info)
+{
+	int i;
+	volatile int r;	 /* gcc 3.4.0-1 strangeness, need to follow up.*/
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return;
+	}
+
+	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
+		for (i = 0; i < info->sector_count; i++) {
+			if (i > 254) { /* 255,256,257,258 */
+				r=i;
+				info->start[i] = base + (((r-(int)255) * SZ_32K) + (255*PHYS_FLASH_SECT_SIZE));
+				info->protect[i] = 0;
+			} else {
+				info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
+				info->protect[i] = 0;
+			}
+		}
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t * info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_INTEL:
+		printf ("INTEL ");
+		break;
+	default:
+		printf ("Unknown Vendor ");
+		break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_28F256L18T:
+		printf ("FLASH 28F256L18T\n");
+		break;
+	default:
+		printf ("Unknown Chip Type\n");
+		break;
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+			info->size >> 20, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i = 0; i < info->sector_count; ++i) {
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s",
+				info->start[i], info->protect[i] ? " (RO)" : "	   ");
+	}
+	printf ("\n");
+	return;
+}
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (FPW * addr, flash_info_t * info)
+{
+	volatile FPW value;
+	/* mb();  this one makes ARM11 err go away, but I want it :) as a guide to problems */
+
+	/* Write auto select command: read Manufacturer ID */
+	addr[0x5555] = (FPW) 0x00AA00AA;
+	addr[0x2AAA] = (FPW) 0x00550055;
+	addr[0x5555] = (FPW) 0x00900090;
+
+	mb ();
+	value = addr[0] & 0xFF;	/* just looking for 89 (8989 is hw pat)*/
+
+	switch (value) {
+
+	case (FPW) INTEL_MANUFACT:
+		info->flash_id = FLASH_MAN_INTEL;
+		break;
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */
+		return(0);		   /* no or unknown flash	*/
+	}
+
+	mb ();
+	value = addr[1];	/* device ID */
+	switch (value) {
+
+	case (FPW) (INTEL_ID_28F256L18T):	 /* 880D */
+		info->flash_id += FLASH_28F256L18T;
+		info->sector_count = 259;	/*0-258*/
+		info->size = SZ_32M;
+		break;			/* => 32 MB	*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		break;
+	}
+
+	if (info->sector_count > CFG_MAX_FLASH_SECT) {
+		printf ("** ERROR: sector count %d > max (%d) **\n",
+				info->sector_count, CFG_MAX_FLASH_SECT);
+		info->sector_count = CFG_MAX_FLASH_SECT;
+	}
+
+	addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */
+
+	return(info->size);
+}
+
+
+/* unprotects a sector for write and erase
+ * on some intel parts, this unprotects the entire chip, but it
+ * wont hurt to call this additional times per sector...
+ */
+void flash_unprotect_sectors (FPWV * addr)
+{
+#define PD_FINTEL_WSMS_READY_MASK    0x0080
+
+	*addr = (FPW) 0x00500050;	/* clear status register */
+
+	/* this sends the clear lock bit command */
+	*addr = (FPW) 0x00600060;
+	*addr = (FPW) 0x00D000D0;
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+	int prot, sect;
+	ulong type, start, last;
+	int rcode = 0;
+#ifdef CONFIG_USE_IRQ
+	int iflag;
+#endif
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	type = (info->flash_id & FLASH_VENDMASK);
+	if ((type != FLASH_MAN_INTEL)) {
+		printf ("Can't erase unknown flash type %08lx - aborted\n",
+				info->flash_id);
+		return 1;
+	}
+
+	prot = 0;
+	for (sect = s_first; sect <= s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+				prot);
+	} else {
+		printf ("\n");
+	}
+
+
+	start = get_timer (0);
+	last = start;
+
+#ifdef CONFIG_USE_IRQ
+	/* Disable interrupts which might cause a timeout here */
+	iflag = disable_interrupts ();
+#endif
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect <= s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+			FPWV *addr = (FPWV *) (info->start[sect]);
+			FPW status;
+
+			printf ("Erasing sector %2d ... ", sect);
+
+			flash_unprotect_sectors (addr);
+
+			/* arm simple, non interrupt dependent timer */
+			reset_timer_masked ();
+
+			*addr = (FPW) 0x00500050;/* clear status register */
+			*addr = (FPW) 0x00200020;/* erase setup */
+			*addr = (FPW) 0x00D000D0;/* erase confirm */
+
+			while (((status =
+					 *addr) & (FPW) 0x00800080) !=
+				   (FPW) 0x00800080) {
+				if (get_timer_masked () >
+					CFG_FLASH_ERASE_TOUT) {
+					printf ("Timeout\n");
+					/* suspend erase     */
+					*addr = (FPW) 0x00B000B0;
+					/* reset to read mode */
+					*addr = (FPW) 0x00FF00FF;
+					rcode = 1;
+					break;
+				}
+			}
+
+			/* clear status register cmd.	*/
+			*addr = (FPW) 0x00500050;
+			*addr = (FPW) 0x00FF00FF;/* resest to read mode */
+			printf (" done\n");
+		}
+	}
+#ifdef CONFIG_USE_IRQ
+	if (iflag)
+		enable_interrupts();
+#endif
+
+	return rcode;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 4 - Flash not identified
+ */
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+	ulong cp, wp;
+	FPW data;
+	int count, i, l, rc, port_width;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return 4;
+	}
+/* get lower word aligned address */
+#ifdef FLASH_PORT_WIDTH16
+	wp = (addr & ~1);
+	port_width = 2;
+#else
+	wp = (addr & ~3);
+	port_width = 4;
+#endif
+
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		data = 0;
+		for (i = 0, cp = wp; i < l; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *) cp);
+		}
+		for (; i < port_width && cnt > 0; ++i) {
+			data = (data << 8) | *src++;
+			--cnt;
+			++cp;
+		}
+		for (; cnt == 0 && i < port_width; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *) cp);
+		}
+
+		if ((rc = write_data (info, wp, SWAP (data))) != 0) {
+			return(rc);
+		}
+		wp += port_width;
+	}
+
+	/*