Commit 95d18589 authored by Matthias Weisser's avatar Matthias Weisser Committed by Albert ARIBAUD
Browse files

imx: Make imx25 compatible to mxc_gpio driver and fix in tx25



Adding support for mxc_gpio driver for imx25 and fix names of registers in tx25
board.
Signed-off-by: default avatarMatthias Weisser <weisserm@arcor.de>
parent 23210d8e
......@@ -86,8 +86,8 @@ struct esdramc_regs {
/* GPIO registers */
struct gpio_regs {
u32 dr; /* data */
u32 dir; /* direction */
u32 gpio_dr; /* data */
u32 gpio_dir; /* direction */
u32 psr; /* pad satus */
u32 icr1; /* interrupt config 1 */
u32 icr2; /* interrupt config 2 */
......@@ -357,4 +357,10 @@ struct aips_regs {
#define WSR_UNLOCK1 0x5555
#define WSR_UNLOCK2 0xAAAA
/* Names used in GPIO driver */
#define GPIO1_BASE_ADDR IMX_GPIO1_BASE
#define GPIO2_BASE_ADDR IMX_GPIO2_BASE
#define GPIO3_BASE_ADDR IMX_GPIO3_BASE
#define GPIO4_BASE_ADDR IMX_GPIO4_BASE
#endif /* _IMX_REGS_H */
......@@ -70,18 +70,18 @@ void tx25_fec_init(void)
writel(0x0, &padctl->pad_d11);
/* drop PHY power and assert reset (low) */
val = readl(&gpio4->dr) & ~((1 << 7) | (1 << 9));
writel(val, &gpio4->dr);
val = readl(&gpio4->dir) | (1 << 7) | (1 << 9);
writel(val, &gpio4->dir);
val = readl(&gpio4->gpio_dr) & ~((1 << 7) | (1 << 9));
writel(val, &gpio4->gpio_dr);
val = readl(&gpio4->gpio_dir) | (1 << 7) | (1 << 9);
writel(val, &gpio4->gpio_dir);
mdelay(5);
debug("resetting phy\n");
/* turn on PHY power leaving reset asserted */
val = readl(&gpio4->dr) | 1 << 9;
writel(val, &gpio4->dr);
val = readl(&gpio4->gpio_dr) | 1 << 9;
writel(val, &gpio4->gpio_dr);
mdelay(10);
......@@ -111,19 +111,19 @@ void tx25_fec_init(void)
/*
* set each to 1 and make each an output
*/
val = readl(&gpio3->dr) | (1 << 10) | (1 << 11) | (1 << 12);
writel(val, &gpio3->dr);
val = readl(&gpio3->dir) | (1 << 10) | (1 << 11) | (1 << 12);
writel(val, &gpio3->dir);
val = readl(&gpio3->gpio_dr) | (1 << 10) | (1 << 11) | (1 << 12);
writel(val, &gpio3->gpio_dr);
val = readl(&gpio3->gpio_dir) | (1 << 10) | (1 << 11) | (1 << 12);
writel(val, &gpio3->gpio_dir);
mdelay(22); /* this value came from RedBoot */
/*
* deassert PHY reset
*/
val = readl(&gpio4->dr) | 1 << 7;
writel(val, &gpio4->dr);
writel(val, &gpio4->dr);
val = readl(&gpio4->gpio_dr) | 1 << 7;
writel(val, &gpio4->gpio_dr);
writel(val, &gpio4->gpio_dr);
mdelay(5);
......
......@@ -24,6 +24,11 @@
#ifndef __MXC_GPIO_H
#define __MXC_GPIO_H
/* Converts a GPIO port number and the internal bit position
* to the GPIO number
*/
#define MXC_GPIO_PORT_TO_NUM(port, bit) (((port - 1) << 5) + (bit & 0x1f))
enum mxc_gpio_direction {
MXC_GPIO_DIRECTION_IN,
MXC_GPIO_DIRECTION_OUT,
......
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