Commit c5d4752c authored by Stephen Warren's avatar Stephen Warren Committed by Albert ARIBAUD
Browse files

ARM: implement erratum 716044 workaround



Add common code to enable the workaround for ARM erratum 716044. This
will be enabled for Tegra.
Signed-off-by: Stephen Warren's avatarStephen Warren <swarren@nvidia.com>
parent 131a1e60
...@@ -485,6 +485,7 @@ The following options need to be configured: ...@@ -485,6 +485,7 @@ The following options need to be configured:
Thumb2 this flag will result in Thumb2 code generated by Thumb2 this flag will result in Thumb2 code generated by
GCC. GCC.
CONFIG_ARM_ERRATA_716044
CONFIG_ARM_ERRATA_742230 CONFIG_ARM_ERRATA_742230
CONFIG_ARM_ERRATA_743622 CONFIG_ARM_ERRATA_743622
CONFIG_ARM_ERRATA_751472 CONFIG_ARM_ERRATA_751472
......
...@@ -310,6 +310,12 @@ ENTRY(cpu_init_cp15) ...@@ -310,6 +310,12 @@ ENTRY(cpu_init_cp15)
#endif #endif
mcr p15, 0, r0, c1, c0, 0 mcr p15, 0, r0, c1, c0, 0
#ifdef CONFIG_ARM_ERRATA_716044
mrc p15, 0, r0, c1, c0, 0 @ read system control register
orr r0, r0, #1 << 11 @ set bit #11
mcr p15, 0, r0, c1, c0, 0 @ write system control register
#endif
#ifdef CONFIG_ARM_ERRATA_742230 #ifdef CONFIG_ARM_ERRATA_742230
mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
orr r0, r0, #1 << 4 @ set bit #4 orr r0, r0, #1 << 4 @ set bit #4
......
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