Commit f2a73d68 authored by Tom Rini's avatar Tom Rini
Browse files

Merge tag 'u-boot-stm32-20200214' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- add DH Electronics DHCOM SoM and PDK2 board
- DT alignment with kernel v5.5-rc7 for stm32mp1 boards
- fix STM32 image format for big endian hosts in mkimage
- solve warnings in device tree and code for stm32mp1 boards
- remove fdt_high and initrd_high for stm32 and stih boards
- add support of STM32MP15x Rev.Z
- update stm32mp1 readme
parents e6da32f2 8ee5e3c8
......@@ -882,7 +882,8 @@ dtb-$(CONFIG_STM32MP15x) += \
stm32mp157a-avenger96.dtb \
stm32mp157c-dk2.dtb \
stm32mp157c-ed1.dtb \
stm32mp157c-ev1.dtb
stm32mp157c-ev1.dtb \
stm32mp15xx-dhcom-pdk2.dtb
dtb-$(CONFIG_SOC_K3_AM6) += k3-am654-base-board.dtb k3-am654-r5-base-board.dtb
dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
......
......@@ -5,7 +5,7 @@
/ {
soc {
ddr: ddr@5A003000 {
ddr: ddr@5a003000 {
u-boot,dm-pre-reloc;
compatible = "st,stm32mp1-ddr";
......
......@@ -138,7 +138,16 @@
status = "disabled";
};
adc12_usb_pwr_pins_a: adc12-usb-pwr-pins-0 {
adc12_ain_pins_a: adc12-ain-0 {
pins {
pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
<STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
<STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
<STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
};
};
adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
pins {
pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
<STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
......@@ -175,6 +184,18 @@
};
};
dac_ch1_pins_a: dac-ch1 {
pins {
pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
};
};
dac_ch2_pins_a: dac-ch2 {
pins {
pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
};
};
dcmi_pins_a: dcmi-0 {
pins {
pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
......@@ -622,13 +643,13 @@
<STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
bias-disable;
drive-push-pull;
slew-rate = <3>;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
bias-pull-up;
drive-push-pull;
slew-rate = <3>;
slew-rate = <1>;
};
};
......@@ -650,13 +671,13 @@
<STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
bias-disable;
drive-push-pull;
slew-rate = <3>;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
bias-pull-up;
drive-push-pull;
slew-rate = <3>;
slew-rate = <1>;
};
};
......
......@@ -128,12 +128,14 @@
u-boot,dm-pre-reloc;
};
&pwr {
&pwr_regulators {
u-boot,dm-pre-reloc;
};
&rcc {
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <0>;
};
&sdmmc1 {
......
......@@ -91,7 +91,7 @@
CLK_UART6_HSI
CLK_UART78_HSI
CLK_SPDIF_PLL4P
CLK_FDCAN_PLL4Q
CLK_FDCAN_PLL4R
CLK_SAI1_PLL3Q
CLK_SAI2_PLL3Q
CLK_SAI3_PLL3Q
......@@ -105,6 +105,8 @@
/* VCO = 1300.0 MHz => P = 650 (CPU) */
pll1: st,pll@0 {
compatible = "st,stm32mp1-pll";
reg = <0>;
cfg = < 2 80 0 0 0 PQR(1,0,0) >;
frac = < 0x800 >;
u-boot,dm-pre-reloc;
......@@ -112,6 +114,8 @@
/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
pll2: st,pll@1 {
compatible = "st,stm32mp1-pll";
reg = <1>;
cfg = < 2 65 1 0 0 PQR(1,1,1) >;
frac = < 0x1400 >;
u-boot,dm-pre-reloc;
......@@ -119,6 +123,8 @@
/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
pll3: st,pll@2 {
compatible = "st,stm32mp1-pll";
reg = <2>;
cfg = < 1 33 1 16 36 PQR(1,1,1) >;
frac = < 0x1a04 >;
u-boot,dm-pre-reloc;
......@@ -126,6 +132,8 @@
/* VCO = 480.0 MHz => P = 120, Q = 40, R = 96 */
pll4: st,pll@3 {
compatible = "st,stm32mp1-pll";
reg = <3>;
cfg = < 1 39 3 11 4 PQR(1,1,1) >;
u-boot,dm-pre-reloc;
};
......
......@@ -252,14 +252,13 @@
regulator-name = "vbus_otg";
interrupts = <IT_OCP_OTG 0>;
interrupt-parent = <&pmic>;
regulator-active-discharge;
};
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
interrupt-parent = <&pmic>;
regulator-active-discharge;
regulator-active-discharge = <1>;
};
};
......@@ -282,11 +281,9 @@
status = "okay";
};
&pwr {
pwr-regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
};
&pwr_regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
};
&rng1 {
......
......@@ -35,24 +35,7 @@
};
&adc {
pinctrl-names = "default";
pinctrl-0 = <&adc12_usb_pwr_pins_a>;
vdd-supply = <&vdd>;
vdda-supply = <&vdd>;
vref-supply = <&vrefbuf>;
status = "okay";
adc1: adc@0 {
/*
* Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19.
* Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
* 5 * (56 + 47kOhms) * 5pF => 2.5us.
* Use arbitrary margin here (e.g. 5µs).
*/
st,min-sample-time-nsecs = <5000>;
/* ANA0, ANA1, USB Type-C CC1 & CC2 */
st,adc-channels = <0 1 18 19>;
status = "okay";
};
};
&clk_hse {
......@@ -127,7 +110,7 @@
CLK_UART6_HSI
CLK_UART78_HSI
CLK_SPDIF_PLL4P
CLK_FDCAN_PLL4Q
CLK_FDCAN_PLL4R
CLK_SAI1_PLL3Q
CLK_SAI2_PLL3Q
CLK_SAI3_PLL3Q
......@@ -141,6 +124,8 @@
/* VCO = 1300.0 MHz => P = 650 (CPU) */
pll1: st,pll@0 {
compatible = "st,stm32mp1-pll";
reg = <0>;
cfg = < 2 80 0 0 0 PQR(1,0,0) >;
frac = < 0x800 >;
u-boot,dm-pre-reloc;
......@@ -148,6 +133,8 @@
/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
pll2: st,pll@1 {
compatible = "st,stm32mp1-pll";
reg = <1>;
cfg = < 2 65 1 0 0 PQR(1,1,1) >;
frac = < 0x1400 >;
u-boot,dm-pre-reloc;
......@@ -155,6 +142,8 @@
/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
pll3: st,pll@2 {
compatible = "st,stm32mp1-pll";
reg = <2>;
cfg = < 1 33 1 16 36 PQR(1,1,1) >;
frac = < 0x1a04 >;
u-boot,dm-pre-reloc;
......@@ -162,6 +151,8 @@
/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
pll4: st,pll@3 {
compatible = "st,stm32mp1-pll";
reg = <3>;
cfg = < 3 98 5 7 7 PQR(1,1,1) >;
u-boot,dm-pre-reloc;
};
......
......@@ -25,6 +25,7 @@
};
memory@c0000000 {
device_type = "memory";
reg = <0xc0000000 0x20000000>;
};
......@@ -92,7 +93,34 @@
"Playback" , "MCLK",
"Capture" , "MCLK",
"MICL" , "Mic Bias";
dais = <&sai2a_port &sai2b_port>;
dais = <&sai2a_port &sai2b_port &i2s2_port>;
status = "okay";
};
};
&adc {
pinctrl-names = "default";
pinctrl-0 = <&adc12_ain_pins_a>, <&adc12_usb_cc_pins_a>;
vdd-supply = <&vdd>;
vdda-supply = <&vdd>;
vref-supply = <&vrefbuf>;
status = "disabled";
adc1: adc@0 {
/*
* Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19.
* Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
* 5 * (56 + 47kOhms) * 5pF => 2.5us.
* Use arbitrary margin here (e.g. 5us).
*/
st,min-sample-time-nsecs = <5000>;
/* AIN connector, USB Type-C CC1 & CC2 */
st,adc-channels = <0 1 6 13 18 19>;
status = "okay";
};
adc2: adc@100 {
/* AIN connector, USB Type-C CC1 & CC2 */
st,adc-channels = <0 1 2 6 18 19>;
st,min-sample-time-nsecs = <5000>;
status = "okay";
};
};
......@@ -146,9 +174,7 @@
reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpiog>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&ltdc_pins_a>;
pinctrl-1 = <&ltdc_pins_sleep_a>;
#sound-dai-cells = <0>;
status = "okay";
ports {
......@@ -161,6 +187,13 @@
remote-endpoint = <&ltdc_ep0_out>;
};
};
port@3 {
reg = <3>;
sii9022_tx_endpoint: endpoint {
remote-endpoint = <&i2s2_endpoint>;
};
};
};
};
......@@ -244,7 +277,7 @@
vddcore: buck1 {
regulator-name = "vddcore";
regulator-min-microvolt = <800000>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
......@@ -345,7 +378,7 @@
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge;
regulator-active-discharge = <1>;
};
};
......@@ -364,6 +397,23 @@
};
};
&i2s2 {
clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
clock-names = "pclk", "i2sclk", "x8k", "x11k";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2s2_pins_a>;
pinctrl-1 = <&i2s2_pins_sleep_a>;
status = "okay";
i2s2_port: port {
i2s2_endpoint: endpoint {
remote-endpoint = <&sii9022_tx_endpoint>;
format = "i2s";
mclk-fs = <256>;
};
};
};
&ipcc {
status = "okay";
};
......@@ -374,6 +424,9 @@
};
&ltdc {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&ltdc_pins_a>;
pinctrl-1 = <&ltdc_pins_sleep_a>;
status = "okay";
port {
......@@ -397,11 +450,9 @@
status = "okay";
};
&pwr {
pwr-regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
};
&pwr_regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
};
&rng1 {
......
......@@ -53,6 +53,19 @@
};
};
&i2c1 {
touchscreen@38 {
compatible = "focaltech,ft6236";
reg = <0x38>;
interrupts = <2 2>;
interrupt-parent = <&gpiof>;
interrupt-controller;
touchscreen-size-x = <480>;
touchscreen-size-y = <800>;
status = "okay";
};
};
&ltdc {
status = "okay";
......
......@@ -107,7 +107,7 @@
CLK_UART6_HSI
CLK_UART78_HSI
CLK_SPDIF_PLL4P
CLK_FDCAN_PLL4Q
CLK_FDCAN_PLL4R
CLK_SAI1_PLL3Q
CLK_SAI2_PLL3Q
CLK_SAI3_PLL3Q
......@@ -121,6 +121,8 @@
/* VCO = 1300.0 MHz => P = 650 (CPU) */
pll1: st,pll@0 {
compatible = "st,stm32mp1-pll";
reg = <0>;
cfg = < 2 80 0 0 0 PQR(1,0,0) >;
frac = < 0x800 >;
u-boot,dm-pre-reloc;
......@@ -128,6 +130,8 @@
/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
pll2: st,pll@1 {
compatible = "st,stm32mp1-pll";
reg = <1>;
cfg = < 2 65 1 0 0 PQR(1,1,1) >;
frac = < 0x1400 >;
u-boot,dm-pre-reloc;
......@@ -135,6 +139,8 @@
/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
pll3: st,pll@2 {
compatible = "st,stm32mp1-pll";
reg = <2>;
cfg = < 1 33 1 16 36 PQR(1,1,1) >;
frac = < 0x1a04 >;
u-boot,dm-pre-reloc;
......@@ -142,6 +148,8 @@
/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
pll4: st,pll@3 {
compatible = "st,stm32mp1-pll";
reg = <3>;
cfg = < 3 98 5 7 7 PQR(1,1,1) >;
u-boot,dm-pre-reloc;
};
......
......@@ -84,7 +84,21 @@
gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <1800000 0x1 2900000 0x0>;
states = <1800000 0x1>,
<2900000 0x0>;
};
};
&dac {
pinctrl-names = "default";
pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
vref-supply = <&vdda>;
status = "disabled";
dac1: dac@1 {
status = "okay";
};
dac2: dac@2 {
status = "okay";
};
};
......@@ -127,7 +141,7 @@
vddcore: buck1 {
regulator-name = "vddcore";
regulator-min-microvolt = <800000>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
......@@ -225,7 +239,7 @@
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge;
regulator-active-discharge = <1>;
};
};
......@@ -263,11 +277,9 @@
status = "okay";
};
&pwr {
pwr-regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
};
&pwr_regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
};
&rng1 {
......
......@@ -32,7 +32,6 @@
joystick {
compatible = "gpio-keys";
#size-cells = <0>;
pinctrl-0 = <&joystick_pins>;
pinctrl-names = "default";
button-0 {
......@@ -189,8 +188,8 @@
clocks = <&clk_ext_camera>;
clock-names = "xclk";
DOVDD-supply = <&v2v8>;
powerdown-gpios = <&stmfx_pinctrl 18 GPIO_ACTIVE_HIGH>;
reset-gpios = <&stmfx_pinctrl 19 GPIO_ACTIVE_LOW>;
powerdown-gpios = <&stmfx_pinctrl 18 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>;
reset-gpios = <&stmfx_pinctrl 19 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
rotation = <180>;
status = "okay";
......@@ -223,7 +222,6 @@
joystick_pins: joystick {
pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4";
drive-push-pull;
bias-pull-down;
};
......@@ -344,14 +342,12 @@
&usbh_ehci {
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "okay";
};
&usbotg_hs {
dr_mode = "peripheral";
phys = <&usbphyc_port1 0>;
phy-names = "usb2-phy";
status = "okay";
};
......
......@@ -939,7 +939,7 @@
interrupt-names = "int0", "int1";
clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
clock-names = "hclk", "cclk";
bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
status = "disabled";
};
......@@ -952,7 +952,7 @@
interrupt-names = "int0", "int1";
clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
clock-names = "hclk", "cclk";
bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
status = "disabled";
};
......@@ -1110,36 +1110,26 @@
#reset-cells = <1>;
};
pwr: pwr@50001000 {
compatible = "st,stm32mp1-pwr", "st,stm32-pwr", "syscon", "simple-mfd";
reg = <0x50001000 0x400>;
system-power-controller;
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
st,sysrcc = <&rcc>;
clocks = <&rcc PLL2_R>;
clock-names = "phyclk";
pwr-regulators {
compatible = "st,stm32mp1,pwr-reg";
st,tzcr = <&rcc 0x0 0x1>;
pwr_regulators: pwr@50001000 {
compatible = "st,stm32mp1,pwr-reg";
reg = <0x50001000 0x10>;
reg11: reg11 {
regulator-name = "reg11";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
reg11: reg11 {
regulator-name = "reg11";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
reg18: reg18 {
regulator-name = "reg18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
reg18: reg18 {
regulator-name = "reg18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
usb33: usb33 {
regulator-name = "usb33";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
usb33: usb33 {
regulator-name = "usb33";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
......
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
* Copyright (C) 2019 Marek Vasut <marex@denx.de>
*/
#include "stm32mp15xx-dhcom-u-boot.dtsi"
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
* Copyright (C) 2019 Marek Vasut <marex@denx.de>
*/
#include "stm32mp15xx-dhcom.dtsi"
/ {
model = "STMicroelectronics STM32MP15xx DHCOM Premium Developer Kit (2)";
compatible = "dh,stm32mp15xx-dhcom-pdk2", "st,stm32mp15x";
aliases {
serial0 = &uart4;
ethernet0 = &ethernet0;
};