Patrick Delaunay authored 4 years ago and Anatolij Gustschin committed 4 years ago

Done with:
./tools/moveconfig.py BMP_16BPP BMP_24BPP BMP_32BPP

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Patrick Delaunay authored 4 years ago and Anatolij Gustschin committed 4 years ago

Done with:
./tools/moveconfig.py VIDEO_BMP_RLE8

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Patrick Delaunay authored 4 years ago and Anatolij Gustschin committed 4 years ago

Done with:
./tools/moveconfig.py VIDEO_BMP_GZIP

The 3 suspicious migration because CMD_BMP and SPLASH_SCREEN
are not activated in these defconfigs:
- trats_defconfig
- s5pc210_universal_defconfig
- trats2_defconfig

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Dario Binacchi authored 4 years ago and Anatolij Gustschin committed 4 years ago

For levels equal to the maximum value, the duty cycle must be equal to
the period.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>

Dario Binacchi authored 4 years ago and Anatolij Gustschin committed 4 years ago

The description of the 'max_level' field was incorrectly assigned to the
'min_level' field.

Signed-off-by: Dario Binacchi <dariobin@libero.it>

Neil Armstrong authored 4 years ago and Anatolij Gustschin committed 4 years ago

The Amlogic D-PHY in the Amlogic AXG SoC Family does support a frequency
higher than 10MHz for the TX Escape Clock, thus make the target rate
configurable.

This is based on the Linux commit [1] and adapted to the U-Boot driver.

[1] a328ca7e4af3 ("drm/bridge: dw-mipi-dsi: permit configuring the escape clock rate")

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Neil Armstrong authored 4 years ago and Anatolij Gustschin committed 4 years ago

The timing values for dw-dsi are often dependent on the used display and
according to Philippe Cornu will most likely also depend on the used phy
technology in the soc-specific implementation.

To solve this and allow specific implementations to define them as needed
add a new get_timing callback to phy_ops and call this from the dphy_timing
function to retrieve the necessary values for the specific mode.

This is based on the Linux commit [1] and adapted to the U-Boot driver.

[1] 25ed8aeb9c39 ("drm/bridge/synopsys: dsi: driver-specific configuration of phy timings")

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

syslog_test.h is in test/log/, not include/

Fixes: 52d3df7f ("log: Allow LOG_DEBUG to always enable log output")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

- Fix Octeon SPI driver for Octeon TX2
- Fix and enhance Octeon watchdog driver
- Misc minor enhancements to Octeon TX/TX2

- Bring in the next round of dev_xxx cleanup patches.

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

Now that linux/compat.h does not define these macros, we do not need to
undefine them.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

All users of these functions now include dm/device_compat.h directly.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Necessary for dev_xxx.

Signed-off-by: Tom Rini <trini@konsulko.com>

Necessary for dev_xxx.

Signed-off-by: Tom Rini <trini@konsulko.com>

Necessary for dev_xxx.

Signed-off-by: Tom Rini <trini@konsulko.com>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

This driver doesn't use DM (in the correct places), so we use a device and
not a udevice. We also need to include device_compat.h

Signed-off-by: Sean Anderson <seanga2@gmail.com>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

This was included, but was ifdef'd out. We also need dm.h for struct
udevice.

Signed-off-by: Sean Anderson <seanga2@gmail.com>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

This header is necessary for the dev_xxx macros.

Signed-off-by: Sean Anderson <seanga2@gmail.com>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

Necessary for dev_xxx.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

Necessary for dev_xxx.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

Necessary for dev_xxx.

Signed-off-by: Sean Anderson <seanga2@gmail.com>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

Necessary for dev_xxx.

Signed-off-by: Sean Anderson <seanga2@gmail.com>

Enable WDT command for Octeon TX/TX2 boards.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>

Suneel Garapati authored 4 years ago and Stefan Roese committed 4 years ago

This patch enhances the Octeon TX/TX2 watchdog driver to fully enable
the WDT. With this changes, the "wdt" command is now also supported
on these platforms.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>

Clock support is needed for all Octeon TX/TX2 boards. This patch selects
CONFIG_CLK so that it is available.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>

Remove a left-over debug test message from the Octeon TX / TX2
MMC driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>

Octeon TX2 sets the TB100_EN bit in the config register. We need to use
a fixed 100MHz clock for this as well to work properly.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

Necessary for dev_xxx.

Signed-off-by: Sean Anderson <seanga2@gmail.com>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

Necessary for dev_xxx.

Signed-off-by: Sean Anderson <seanga2@gmail.com>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

Necessary for dev_xxx.

Signed-off-by: Sean Anderson <seanga2@gmail.com>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

This includes device_compat.h, and fixes several calls to dev_xxx.

Signed-off-by: Sean Anderson <seanga2@gmail.com>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

This header is necessary for the dev_xxx macros.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

We call log_debug, but do not have a category set.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Sean Anderson authored 4 years ago and Tom Rini committed 4 years ago

Necessary for dev_xxx.

Signed-off-by: Sean Anderson <seanga2@gmail.com>

- fsl_esdhc_imx cleanup
- not send cm13 if send_status is 0.
- Add reinit API
- Add mmc HS400 for fsl_esdhc
- Several cleanup for fsl_esdhc
- Add ADMA2 for sdhci

- Octeon TX: Add NAND driver (Suneel)
- Octeon TX: Add NIC driver driver (Suneel)
- Octeon TX2: Add NIC driver driver (Suneel)
- Armada 8040: Add iEi Puzzle-M80 board support (Luka)
- Armada A37xx SPI: Add support for CS-GPIO (George)
- Espressobin: Use Linux model/compatible strings (Andre)
- Espressobin: Add armada-3720-espressobin-emmc.dts from Linux (Andre)
- Armada A37xx: Small cleanup of config header (Pali)

- Add support for Linux "pstore" dumps.
- Button command fixup.
- gd cleanup and documentation.
- Assorted other cleanups.

Heinrich Schuchardt authored 4 years ago and Tom Rini committed 4 years ago

Sphinx.override_domain() is deprecated since Sphinx 1.8 and removed in
Sphinx 3.

Use Sphinx.add_domain(, override=True) instead.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

Christian Gmeiner authored 4 years ago and Tom Rini committed 4 years ago

Set the defaults on probe for the packet buffer size registers
for the i210.

The TX/RX PBSIZE register of the i210 resets to its default value
only at power-on - see Intel Ethernet Controller I210 Datasheet rev 3.5
chapter 8.3 'Internal Packet Buffer Size Registers'.

If something (another driver, another OS, etc.) modifies this register
from its default value, the e1000 driver doesn't function correctly. It
detects a hang of the transmitter and continuously resets the adapter.
Here we set this value to its default when resetting the i210 to
resolve this issue.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>

Alper Nebi Yasak authored 4 years ago and Tom Rini committed 4 years ago

CONFIG_IS_ENABLED() takes the kconfig name without the CONFIG_ prefix,
e.g. CONFIG_IS_ENABLED(CLK) for CONFIG_CLK. Make including the prefix
an error in checkpatch.pl so calls in the wrong format aren't
accidentally reintroduced.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>