1. 15 Mar, 2021 4 commits
  2. 12 Mar, 2021 8 commits
    • Tom Rini's avatar
      Merge https://source.denx.de/u-boot/custodians/u-boot-marvell · ad7e1c7c
      Tom Rini authored
      - Some more updates/sync's to A38x DDR3 code (Marek & Pali)
      - marvell/ddr/AXP: Some type fixes found in the LTO work (Marek)
      - Espressobin: Enable more options (Pali)
      - pci-aardvark: Implement workaround for the readback value of
        VEND_ID (Paili)
      ad7e1c7c
    • Pali Rohár's avatar
      arm: mvebu: a38x: Remove dead code ARMADA_39X · 15942805
      Pali Rohár authored and Stefan Roese's avatar Stefan Roese committed
      
      
      Config option ARMADA_39X is never set so remove all dead code hidden under
      ifdef CONFIG_ARMADA_39X blocks.
      
      Also remove useless checks for CONFIG_ARMADA_38X define as this macro is
      always defined for a38x code path.
      Signed-off-by: default avatarPali Rohár <pali@kernel.org>
      Reviewed-by: Stefan Roese's avatarStefan Roese <sr@denx.de>
      15942805
    • Pali Rohár's avatar
      arm: a37xx: pci: Implement workaround for the readback value of VEND_ID · 2fa30d04
      Pali Rohár authored and Stefan Roese's avatar Stefan Roese committed
      
      
      Marvell Armada 3720 Functional Errata, Guidelines, and Restrictions
      document describes in erratum 4.1 PCIe value of vendor ID (Ref #: 243):
      
          The readback value of VEND_ID (RD0070000h [15:0]) is 1B4Bh, while it
          should read 11ABh.
      
          The firmware can write the correct value, 11ABh, through VEND_ID
          (RD0076044h [15:0]).
      
      Implement this workaround in U-Boot PCIe controller driver aardvark for
      both PCI vendor id and PCI subsystem vendor id.
      
      This change affects PCI vendor id of PCIe root bridge emulated by Linux
      kernel. With this change Linux kernel reports correct vendor id 11AB.
      Signed-off-by: default avatarPali Rohár <pali@kernel.org>
      Reviewed-by: Stefan Roese's avatarStefan Roese <sr@denx.de>
      2fa30d04
    • Pali Rohár's avatar
      arm: mvebu: Espressobin: Enable additional options · e33e2092
      Pali Rohár authored and Stefan Roese's avatar Stefan Roese committed
      
      
      Enable support for NVMe disks which can be connected to mPCIe slot via M.2
      reduction. Enable btrfs and squashfs filesystems which are used by more
      Linux distributions. And enable fsuuid and setexpr commands which can be
      useful in scripting.
      Signed-off-by: default avatarPali Rohár <pali@kernel.org>
      Reviewed-by: Stefan Roese's avatarStefan Roese <sr@denx.de>
      e33e2092
    • Marek Behún's avatar
      ddr: marvell: axp: fix array types have different bounds warning · 74f4929c
      Marek Behún authored and Stefan Roese's avatar Stefan Roese committed
      
      
      The arrays `pbs_dq_mapping`, `div_ratio1to1` and `div_ratio2to1` have
      different bounds declared in header files where these variables are also
      defined from the ones declared in source files.
      
      This causes the compiler to complain (when building with LTO):
        ddr3_sdram.c:24:12: warning: type of ‘pbs_dq_mapping’ does not match
                                     original declaration
      			       [-Wlto-type-mismatch]
        ddr3_patterns_64bit.h:911:5: note: array types have different bounds
        ddr3_patterns_64bit.h:911:5: note: ‘pbs_dq_mapping’ was previously
                                           declared here
      
      ddr3_dfs.c:45:11: warning: type of ‘div_ratio1to1’ does not match
                                 original declaration [-Wlto-type-mismatch]
      ddr3_axp_vars.h:167:4: note: array types have different bounds
      ddr3_axp_vars.h:167:4: note: ‘div_ratio1to1’ was previously declared
                                   here
      
      ddr3_dfs.c:46:11: warning: type of ‘div_ratio2to1’ does not match
                                 original declaration [-Wlto-type-mismatch]
      ddr3_axp_vars.h:196:4: note: array types have different bounds
      ddr3_axp_vars.h:196:4: note: ‘div_ratio2to1’ was previously declared
                                   here
      
      CI managed to trigger this as an error when compiling with LTO for AXP.
      
      Fix this by using values from the header files, which seem to be the
      correct ones.
      Signed-off-by: default avatarMarek Behún <marek.behun@nic.cz>
      74f4929c
    • Marek Behún's avatar
      ddr: marvell: axp: align signature of mv_xor_mem_init() with a38x · e5b3e87d
      Marek Behún authored and Stefan Roese's avatar Stefan Roese committed
      
      
      In arch/arm/mach-mvebu/dram.c we always include axp's xor.h for common
      XOR definitions, regardless whether we compile for axp or a38x.
      
      But the declaration of this function has a different signature in axp's
      xor.h from the one used in a38x' implementation - one parameter is u64
      instead of u32. This can result in wrong argument's being passed to that
      function on a38x with no one the wiser.
      
      I discovered this when building U-Boot for Turris Omnia with LTO. The
      compiler complains about the different signatures being thrown into the
      same linking process:
      
        axp/xor.h:67:5: warning: type of ‘mv_xor_mem_init’ does not match
                                 original declaration [-Wlto-type-mismatch]
         67 | int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size,
            |     ^
        a38x/xor.c:165:5: note: type mismatch in parameter 3
        165 | int mv_xor_mem_init(u32 chan, u32 start_ptr, unsigned long long
            |     ^
        a38x/xor.c:165:5: note: type ‘long long unsigned int’ should match
                                type ‘u32’
      
      Fix this by changing the type of the block_size argument in the axp's
      implementation and header file to the one used in a38x (and upstream
      mv-ddr-marvell).
      Signed-off-by: default avatarMarek Behún <marek.behun@nic.cz>
      Reviewed-by: Stefan Roese's avatarStefan Roese <sr@denx.de>
      e5b3e87d
    • Pali Rohár's avatar
      ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository · 107c3391
      Pali Rohár authored and Stefan Roese's avatar Stefan Roese committed
      This syncs drivers/ddr/marvell/a38x/ with the master branch of repository
      https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
      
       up to the
      commit 7c351731d196 ("Merge pull request #29 from pali/sync-a38x-uboot").
      
      This patch was created by following steps:
      
      1. Replace all a38x files in U-Boot tree by files from upstream github
         Marvell mv-ddr-marvell repository.
      
      2. Run following command to omit portions not relevant for a38x and ddr3:
      
          files=drivers/ddr/marvell/a38x/*
          sed 's/#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X)/#ifdef TRUE/' -i $files
          unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 -UCONFIG_APN806 \
              -UCONFIG_MC_STATIC -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
              -UCONFIG_PHY_STATIC_PRINT -UCONFIG_CUSTOMER_BOARD_SUPPORT \
              -UCONFIG_A3700 -UA3900 -UA80X0 -UA70X0 -DTRUE $files
      
      3. Manually omit SPDX-License-Identifier changes from this patch as
         upstream license in  upstream github repository contains long license
         texts and U-Boot is using just SPDX-License-Identifier.
      
      After applying this patch, a38x ddr3 code in upstream Marvell github
      repository and in U-Boot would be fully identical. So in future applying
      above steps could be used to sync code again.
      
      The only change in this patch is removal of dead code and some fixes with
      include files.
      Signed-off-by: default avatarPali Rohár <pali@kernel.org>
      Tested-by: default avatarChris Packham <judge.packham@gmail.com>
      Reviewed-by: Stefan Roese's avatarStefan Roese <sr@denx.de>
      107c3391
    • Sujeet Baranwal's avatar
      ddr: marvell: a38x: Add more space for additional info from SPD · a5fc0990
      Sujeet Baranwal authored and Stefan Roese's avatar Stefan Roese committed
      
      
      commit 258be123226f8f5cd516b7813fe201fb7d7416e9 upstream.
      
      At this moment, only page 0 of SPD is being read but to support
      smbios, we need to read page 1 also which has more info. In order
      to do that, we need to allocate more space.
      Signed-off-by: default avatarSujeet Baranwal <sujeet.baranwal@cavium.com>
      Tested-by: default avatarsa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
      Reviewed-by: default avatarSujeet Kumar Baranwal <Sujeet.Baranwal@cavium.com>
      Reviewed-by: default avatarNadav Haklai <nadavh@marvell.com>
      Signed-off-by: default avatarMarek Behún <marek.behun@nic.cz>
      Tested-by: default avatarChris Packham <judge.packham@gmail.com>
      a5fc0990
  3. 10 Mar, 2021 2 commits
  4. 09 Mar, 2021 5 commits
  5. 08 Mar, 2021 12 commits
  6. 07 Mar, 2021 6 commits
  7. 06 Mar, 2021 1 commit
  8. 05 Mar, 2021 2 commits