- Feb 17, 2023
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Yu Chien Peter Lin authored
The L2C configuration register has MAP field to indicate its version is v0 (Gen1) or v1 (Gen2) L2-cache. This patch makes the driver compatible with both memory-mapped scheme. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Yu Chien Peter Lin authored
The L2-cache is not enabled currently, the enbale_caches() will call the v5l2_enable() callback to enable it in SPL. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Leo Yu-Chi Liang authored
There is no need for RISCV_NDS_CACHE config to control cache switches. Signed-off-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Yu Chien Peter Lin authored
PLIC is used for external interrupt, while PLICSW is an Andes-specific design for software interrupt. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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- Feb 13, 2023
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@konsulko.com>
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Co-developed-by:
Mike Worsfold <mworsfold@impinj.com> Signed-off-by:
Mike Worsfold <mworsfold@impinj.com> Signed-off-by:
Sumit Garg <sumit.garg@linaro.org>
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https://source.denx.de/u-boot/custodians/u-boot-i2cTom Rini authored
i2c updates for v2023.04 - add new i2c driver ast2600 from Ryan Chen - i2c-cdns: make read fifo-depth configurable through device tree from Pei Yue Ho - mxc i2c driver: print base address in hex, not in decimal from Fabio
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https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini authored
- mvebu: Support for 2 new Armada 385 boards (Tony) - mvebu: Minor misc board enhancements (Tony) - kirkwood: Serial driver fixes (Kconfig & dtsi) (Tony) - cmd: return code when tlv_eeprom incorrectly called (Heinrich)
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When DM_SERIAL is enabled, the device-tree tag u-boot,dm-pre-reloc is required for this board to boot over UART with kwboot. Enable this in kirkwood-pogoplug-series-4-u-boot.dtsi. Added by Stefan while applying: Please note that it's not fully understood, why this property really is needed. Here a link to the discussion about this: https://lore.kernel.org/r/20230201080210.ypz4nrj4y2igwxz3@pali/ Signed-off-by:
Tony Dinh <mibodhi@gmail.com> Reviewed-by:
Stefan Roese <sr@denx.de>
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Synology DS116 is a NAS based on Marvell Armada 385 SoC. Board Specification: - Marvel MV88F6820 Dual Core at 1.8GHz - 1 GiB DDR3 RAM - 8MB Macronix mx25l6405d SPI flash - I2C - 2x USB 3.0 - 1x GBE LAN port (PHY: Marvell 88E1510) - 1x SATA (6 Gbps) - 3x LED - PIC16F1829 (connected to uart1) - GPIO fan - serial console Note that this patch depends on the add-support for Thecus N2350 patch: https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/ Signed-off-by:
Tony Dinh <mibodhi@gmail.com>
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Currently, only the 1st SATA port is powered up (by GPIO1 12). Add GPIO1 13 in board initialization to power up the 2nd SATA port. Note that this patch depends on the initial add-support patch: https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/ Signed-off-by:
Tony Dinh <mibodhi@gmail.com> Reviewed-by:
Stefan Roese <sr@denx.de>
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Sheevaplug board has 512K CONFIG_BOARD_SIZE_LIMIT. Recently, DM_SERIAL has pushed the image size a few hundred bytes over that limit. So explicitly deselect some configs that are unrelated to this board (and gain back a bit over 2K). Signed-off-by:
Tony Dinh <mibodhi@gmail.com>
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Thecus N2350 is a NAS based on Marvell Armada 385 SoC. Specification: - Processor: Marvel MV88F6820 Dual Core at 1GHz - 1 GiB DDR4 RAM - 4MB Macronix mx25l3205d SPI flash - 512MB Hynix H27U4G8F2DTR-BC NAND flash - I2C - 2x USB 3.0 - 1x GBE LAN port (PHY: Marvell 88E1510) - 2x SATA (hot swap slots) - 3x buttons - 10x LEDS - serial console Signed-off-by:
Tony Dinh <mibodhi@gmail.com> Reviewed-by:
Stefan Roese <sr@denx.de>
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CONFIG_SYS_NS16550 is required when DM_SERIAL is enabled for Kirkwood boards. Signed-off-by:
Tony Dinh <mibodhi@gmail.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Stefan Roese <sr@denx.de>
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A command called with incorrect parameters should set $? to 1 (false). Instead of calling cmd_usage(cmdtp) and then returning 0 just return CMD_RET_FAILURE. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by:
Baruch Siach <baruch@tkos.co.il> Reviewed-by:
Stefan Roese <sr@denx.de>
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Enable driver to fetch the optional parameter (fifo-depth) from device tree. If the parameter is not found in the device tree, it will use the default value declared in the driver. Signed-off-by:
Pei Yue Ho <peiyue.ho@starfivetech.com> Reviewed-by:
Wei Liang Lim <weiliang.lim@starfivetech.com> Reviewed-by:
Eng Lee Teh <englee.teh@starfivetech.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Add description for fifo-depth parameter that can be used in the device tree. Signed-off-by:
Pei Yue Ho <peiyue.ho@starfivetech.com> Reviewed-by:
Wei Liang Lim <weiliang.lim@starfivetech.com> Reviewed-by:
Eng Lee Teh <englee.teh@starfivetech.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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The i2c driver have global register that i2c bus use ofnode_get_parent to get parent register address. Signed-off-by:
Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Add i2c new register mode driver to support AST2600 i2c new register mode. AST2600 i2c controller have legacy and new register mode. The new register mode have global register support 4 base clock for scl clock selection, and new clock divider mode. Signed-off-by:
Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Printing the I2C controller base address in decimal notation is not helpful. Change it to hex notation, which is the standard format found in the Reference Manual and devicetree. Signed-off-by:
Fabio Estevam <festevam@denx.de> Acked-by:
Dhruva Gole <d-gole@ti.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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https://source.denx.de/u-boot/custodians/u-boot-dmTom Rini authored
minor changes to fdt command and binman
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At the moment every subcommand of "fdt", except "addr" itself, requires the DT address to be set first. We explicitly check for that before even comparing against the subcommands' string. This early bailout also affects the "move" subcommand, even though that does not require or rely on a previous call to "fdt addr". In fact it even sets the FDT address to the target of the move command, so is a perfect beginning for a sequence of fdt commands. Move the check for a previously set FDT address to after we handle the "move" command also, so we don't need a dummy call to "fdt addr" first, before being able to move the devicetree. This skips one pointless "fdt addr" call in scripts which aim to alter the control DT, but need to copy it to a safe location first (for instance to $fdt_addr_r). Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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The "fdt move" subcommand was using the provided DTB addresses directly, without trying to "map" them into U-Boot's address space. This happened to work since on the vast majority of "real" platforms there is a simple 1:1 mapping of VA to PAs, so either value works fine. However this is not true on the sandbox, so the "fdt move" command fails there miserably: => fdt addr $fdtcontroladdr => cp.l $fdtcontroladdr $fdt_addr_r 40 # simple memcpy works => fdt move $fdtcontroladdr $fdt_addr_r Segmentation fault Use the proper "map_sysmem" call to convert PAs to VAs, to make this more robust in general and to enable operation in the sandbox. Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
At present we show 'main section' as the top-level section name. It may be more helpful to show the actual image name. This is tricky because Image is a parent class of Entry_section, so there is no distinction between an image and a section. Update it to show the image name. Signed-off-by:
Simon Glass <sjg@chromium.org>
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- Feb 12, 2023
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Previously, the TX LED would flash but nothing would appear on the serial port, and the board would appear dead with a build of the socfpga_cyclone5_defconfig. I have verified that adding the frequency to the uart will fix the serial console on my board. Thanks to @ehoffman on the Rocketboards forum: https://forum.rocketboards.org/t/cyclonev-programming-fpga-from-u-boot/2230/30 Signed-off-by:
Jade Lovelace <lists@jade.fyi> Reviewed-by:
Marek Vasut <marex@denx.de>
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https://source.denx.de/u-boot/custodians/u-boot-clkTom Rini authored
Clock changes for 2023.04-rc1 This contains various fixes and small features. I've included a reset patch as well since it was in the same series as a clock patch.
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https://source.denx.de/u-boot/custodians/u-boot-mpc8xxTom Rini authored
- A fix for a long standing bug that has been exposed by commit 50128aeb ("cyclic: get rid of cyclic_init()") preventing 8xx boards from booting since u-boot 2023.01 - A GPIO driver for powerpc 8xx chip - Fixup for powerpc 8xx SPI driver - A new powerpc 8xx board - The two devices having that board.
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This allows devm_reset_control_get(dev, NULL) to work and get the first reset control, which is common in code ported from Linux. Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20230122000252.53642-2-samuel@sholland.org
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This allows devm_clock_get(dev, NULL) to work and get the first clock, which is common in code ported from Linux. Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Sean Anderson <seanga2@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20230122000252.53642-1-samuel@sholland.org
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The clock UCLASS need to be probed to allow availability of the private data (struct clk *), get in show_clks() with dev_get_clk_ptr() before use them. Without this patch the clock dump can cause crash because all the private data are not available before calling the API clk_get_rate(). It is the case for the SCMI clocks, priv->channel is needed for scmi_clk_get_rate() and it is initialized only in scmi_clk_probe(). This issue causes a crash for "clk dump" command on STM32MP135F-DK board for SCMI clock not yet probed. Fixes: 1a725e22 ("clk: fix clock tree dump to properly dump out every registered clock") Signed-off-by:
Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by:
Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20221213145708.v2.1.Ia0bc6b272f1e2e3f37873c61d79138c2663c4055@changeid
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[backport from linux commit 2626cf67f20b28446dfc3a5b9493dd535cdb747b] According to the "Clock Root" table of the reference manual (document IMX8MNRM Rev 2, 07/2022): Clock Root offset Source Select (CCM_TARGET_ROOTn[MUX]) ... ... ... ENET_PHY_REF_CLK_ROOT 0xAA80 000 - 24M_REF_CLK 001 - SYSTEM_PLL2_DIV20 010 - SYSTEM_PLL2_DIV8 011 - SYSTEM_PLL2_DIV5 100 - SYSTEM_PLL2_DIV2 101 - AUDIO_PLL1_CLK 110 - VIDEO_PLL_CLK 111 - AUDIO_PLL2_CLK ... ... ... while the imx8mn_enet_phy_sels list didn't contained audio_pll1_out for source select bits 101b. Signed-off-by:
Dario Binacchi <dario.binacchi@amarulasolutions.com> Acked-by:
Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20221219113127.528282-4-dario.binacchi@amarulasolutions.com
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[backport from linux commit bedcf9d1dcf88ed38731f0ac9620e5a421e1e9d6] Unlike audio_pll1 and audio_pll2, there is no video_pll2. Further, the name used in the RM is video_pll. So, let's rename "video_pll1" to "video_pll" to be consistent with the RM and avoid misunderstandings. No functional changes intended. Signed-off-by:
Dario Binacchi <dario.binacchi@amarulasolutions.com> Acked-by:
Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20221219113127.528282-3-dario.binacchi@amarulasolutions.com
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[backport from linux commit a429c60baefd95ab43a2ce7f25d5b2d7a2e431df] The IMX8MN platform does not have any video processing unit (VPU), and indeed in the reference manual (document IMX8MNRM Rev 2, 07/2022) there is no occurrence of its pll. From an analysis of the code and the RM itself, I think vpu pll is used instead of m7 alternate pll, probably for copy and paste of code taken from modules of similar architectures. Signed-off-by:
Dario Binacchi <dario.binacchi@amarulasolutions.com> Acked-by:
Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20221219113127.528282-2-dario.binacchi@amarulasolutions.com
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Fix bug for npcm7xx bmc calculate pll clock. PLLCON1 need to divide by 2. Signed-off-by:
Jim Liu <JJLIU0@nuvoton.com> Acked-by:
Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20221121091528.1351-1-JJLIU0@nuvoton.com
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In various cases logical memory blocks are coalesced; As a result doing a strict check whether memory blocks are the same doesn't necessarily work as a previous addition of a given block might have been merged into a bigger block. Fix this by considering a block is already registered if it's a pure subset of one of the existing blocks. Signed-off-by:
Sjoerd Simons <sjoerd@collabora.com>
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Tom Rini authored
To quote the author: Since U-Boot's tracing feature was originally written, quite a few changes have taken place in this domain. The original text format used by tracing is still emitted by Linux, but a new trace-cmd tool has invented a binary format which is now used by new tools, such as kernelshark. With recent distributions and the move to Python 3, the old pybootchart tool does not build or run. Unfortunately there is no 1:1 replacement for the features that were provided by pybootchart, or at least it is not obvious. Still, it makes sense to keep with the times. This series updates proftool to use the new binary format, adding support for function and funcgraph tracing, so that U-Boot's trace records can be examined by trace-cmd and kernelshark. This series also adds support for a flamegraph, which provides a visual way to see which functions are called a lot, as well as which ones consume the most time. Some minor updates to the trace implementation within U-Boot are included, to provide a little more information and to fix a few problems. No unit tests are provided by proftool, but a functional test ensures that sandbox can emit traces which can be processed by proftool, then parsed by trace-cmd and that the timing of the various formats looks consistent.
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- Feb 11, 2023
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Tom Rini authored
Move to the latest tag for "Jammy" and rebuild the containers. Signed-off-by:
Tom Rini <trini@konsulko.com>
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Revamp the documentation for the new features, including a description of the new features and documentation for the trace command. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Add a test which runs sandbox, collects a trace and makes sure it can be processed by trace-cmd. This should ensure that this feature continues to work as U-Boot and trace-cmd evolve. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Build trace-cmd as part of the docker image, so that trace tests can be used. Unfortunately the version provided by distributions is a little old and has bugs. It also does not support specifying the time base for the trace, which is required to convert microseconds to nanaseconds. Signed-off-by:
Simon Glass <sjg@chromium.org>
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