- Feb 17, 2023
-
-
Tom Rini authored
Rsync all defconfig files using moveconfig.py Signed-off-by:Tom Rini <trini@konsulko.com>
-
https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini authored
- binman: Add help message if opensbi is absent when building u-boot SPL - AndesTech: rename cpu and board name to 'andesv5' and 'ae350' - Clean up cache operation for Andes ae350 platform
-
Rick Chen authored
Add the 'missing-msg' for more detailed output on missing system firmware. Signed-off-by:
Rick Chen <rick@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Yu Chien Peter Lin <peterlin@andestech.com>
-
Leo Yu-Chi Liang authored
Adjust the initial stack pointer address to 0x10000000(256M) Signed-off-by:
-
Leo Yu-Chi Liang authored
The current ae350-related defconfigs could also support newer Andes CPU IP, so modify the names of CPU from ax25 to andesv5, and board name from ax25-ae350 to ae350. Signed-off-by:
-
Yu Chien Peter Lin authored
This patch fixes following warning for the riscv32 toolchain. drivers/cache/cache-v5l2.c:122:16: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] 122 | regs = (struct l2cache *)dev_read_addr(dev); | ^ Signed-off-by: -
Yu Chien Peter Lin authored
Display information about CPU and board during start up. Signed-off-by:
-
Yu Chien Peter Lin authored
Loading an image via TFTP is often interrupted when retrying more than 10 times, increase the number of retries so that it does not simply stop the transfer. Signed-off-by:
-
Yu Chien Peter Lin authored
To reduce the code size, CONFIG_V5L2_CACHE was disabled since commit: ca06444a Turing on does not significantly increase the size of u-boot-spl.bin, so we enable it by default to improve performance. Signed-off-by:
-
Yu Chien Peter Lin authored
This patch refines L1 cache enable/disable and v5l2-cache enable functions. Signed-off-by:
-
Yu Chien Peter Lin authored
Update the compatible string of L2 cache. Signed-off-by:
-
Yu Chien Peter Lin authored
As the OpenSBI v1.2 does not enable the cache [0], we enable the i/d-cache in harts_early_init() and do not disable in cleanup_before_linux(). This patch also simplifies the logic and moves the CSR encoding to include/asm/arch-andes/csr.h. [0] https://github.com/riscv-software-src/opensbi/commit/bd7ef4139829da5c30fa980f7498d385124408fa Signed-off-by:
-
Yu Chien Peter Lin authored
The L2C configuration register has MAP field to indicate its version is v0 (Gen1) or v1 (Gen2) L2-cache. This patch makes the driver compatible with both memory-mapped scheme. Signed-off-by:
-
Yu Chien Peter Lin authored
The L2-cache is not enabled currently, the enbale_caches() will call the v5l2_enable() callback to enable it in SPL. Signed-off-by:
-
Leo Yu-Chi Liang authored
There is no need for RISCV_NDS_CACHE config to control cache switches. Signed-off-by:
-
Yu Chien Peter Lin authored
PLIC is used for external interrupt, while PLICSW is an Andes-specific design for software interrupt. Signed-off-by:
-
- Feb 13, 2023
-
-
Tom Rini authored
Signed-off-by: -
Co-developed-by:
Mike Worsfold <mworsfold@impinj.com> Signed-off-by:
Sumit Garg <sumit.garg@linaro.org>
-
https://source.denx.de/u-boot/custodians/u-boot-i2cTom Rini authored
i2c updates for v2023.04 - add new i2c driver ast2600 from Ryan Chen - i2c-cdns: make read fifo-depth configurable through device tree from Pei Yue Ho - mxc i2c driver: print base address in hex, not in decimal from Fabio
-
https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini authored
- mvebu: Support for 2 new Armada 385 boards (Tony) - mvebu: Minor misc board enhancements (Tony) - kirkwood: Serial driver fixes (Kconfig & dtsi) (Tony) - cmd: return code when tlv_eeprom incorrectly called (Heinrich)
-
When DM_SERIAL is enabled, the device-tree tag u-boot,dm-pre-reloc is required for this board to boot over UART with kwboot. Enable this in kirkwood-pogoplug-series-4-u-boot.dtsi. Added by Stefan while applying: Please note that it's not fully understood, why this property really is needed. Here a link to the discussion about this: https://lore.kernel.org/r/20230201080210.ypz4nrj4y2igwxz3@pali/ Signed-off-by:
Tony Dinh <mibodhi@gmail.com> Reviewed-by:
Stefan Roese <sr@denx.de>
-
Synology DS116 is a NAS based on Marvell Armada 385 SoC. Board Specification: - Marvel MV88F6820 Dual Core at 1.8GHz - 1 GiB DDR3 RAM - 8MB Macronix mx25l6405d SPI flash - I2C - 2x USB 3.0 - 1x GBE LAN port (PHY: Marvell 88E1510) - 1x SATA (6 Gbps) - 3x LED - PIC16F1829 (connected to uart1) - GPIO fan - serial console Note that this patch depends on the add-support for Thecus N2350 patch: https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/ Signed-off-by:
-
Currently, only the 1st SATA port is powered up (by GPIO1 12). Add GPIO1 13 in board initialization to power up the 2nd SATA port. Note that this patch depends on the initial add-support patch: https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/ Signed-off-by:
-
Sheevaplug board has 512K CONFIG_BOARD_SIZE_LIMIT. Recently, DM_SERIAL has pushed the image size a few hundred bytes over that limit. So explicitly deselect some configs that are unrelated to this board (and gain back a bit over 2K). Signed-off-by: -
Thecus N2350 is a NAS based on Marvell Armada 385 SoC. Specification: - Processor: Marvel MV88F6820 Dual Core at 1GHz - 1 GiB DDR4 RAM - 4MB Macronix mx25l3205d SPI flash - 512MB Hynix H27U4G8F2DTR-BC NAND flash - I2C - 2x USB 3.0 - 1x GBE LAN port (PHY: Marvell 88E1510) - 2x SATA (hot swap slots) - 3x buttons - 10x LEDS - serial console Signed-off-by:
-
CONFIG_SYS_NS16550 is required when DM_SERIAL is enabled for Kirkwood boards. Signed-off-by:
-
A command called with incorrect parameters should set $? to 1 (false). Instead of calling cmd_usage(cmdtp) and then returning 0 just return CMD_RET_FAILURE. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by:
Baruch Siach <baruch@tkos.co.il> Reviewed-by:
-
Enable driver to fetch the optional parameter (fifo-depth) from device tree. If the parameter is not found in the device tree, it will use the default value declared in the driver. Signed-off-by:
Pei Yue Ho <peiyue.ho@starfivetech.com> Reviewed-by:
Wei Liang Lim <weiliang.lim@starfivetech.com> Reviewed-by:
Eng Lee Teh <englee.teh@starfivetech.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
-
Add description for fifo-depth parameter that can be used in the device tree. Signed-off-by:
-
The i2c driver have global register that i2c bus use ofnode_get_parent to get parent register address. Signed-off-by:
Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by:
-
Add i2c new register mode driver to support AST2600 i2c new register mode. AST2600 i2c controller have legacy and new register mode. The new register mode have global register support 4 base clock for scl clock selection, and new clock divider mode. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
-
Printing the I2C controller base address in decimal notation is not helpful. Change it to hex notation, which is the standard format found in the Reference Manual and devicetree. Signed-off-by:
Fabio Estevam <festevam@denx.de> Acked-by:
Dhruva Gole <d-gole@ti.com> Reviewed-by:
-
https://source.denx.de/u-boot/custodians/u-boot-dmTom Rini authored
minor changes to fdt command and binman
-
At the moment every subcommand of "fdt", except "addr" itself, requires the DT address to be set first. We explicitly check for that before even comparing against the subcommands' string. This early bailout also affects the "move" subcommand, even though that does not require or rely on a previous call to "fdt addr". In fact it even sets the FDT address to the target of the move command, so is a perfect beginning for a sequence of fdt commands. Move the check for a previously set FDT address to after we handle the "move" command also, so we don't need a dummy call to "fdt addr" first, before being able to move the devicetree. This skips one pointless "fdt addr" call in scripts which aim to alter the control DT, but need to copy it to a safe location first (for instance to $fdt_addr_r). Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Reviewed-by:
-
The "fdt move" subcommand was using the provided DTB addresses directly, without trying to "map" them into U-Boot's address space. This happened to work since on the vast majority of "real" platforms there is a simple 1:1 mapping of VA to PAs, so either value works fine. However this is not true on the sandbox, so the "fdt move" command fails there miserably: => fdt addr $fdtcontroladdr => cp.l $fdtcontroladdr $fdt_addr_r 40 # simple memcpy works => fdt move $fdtcontroladdr $fdt_addr_r Segmentation fault Use the proper "map_sysmem" call to convert PAs to VAs, to make this more robust in general and to enable operation in the sandbox. Signed-off-by:
-
Simon Glass authored
At present we show 'main section' as the top-level section name. It may be more helpful to show the actual image name. This is tricky because Image is a parent class of Entry_section, so there is no distinction between an image and a section. Update it to show the image name. Signed-off-by:
-
- Feb 12, 2023
-
-
Previously, the TX LED would flash but nothing would appear on the serial port, and the board would appear dead with a build of the socfpga_cyclone5_defconfig. I have verified that adding the frequency to the uart will fix the serial console on my board. Thanks to @ehoffman on the Rocketboards forum: https://forum.rocketboards.org/t/cyclonev-programming-fpga-from-u-boot/2230/30 Signed-off-by:
Jade Lovelace <lists@jade.fyi> Reviewed-by:
Marek Vasut <marex@denx.de>
-
https://source.denx.de/u-boot/custodians/u-boot-clkTom Rini authored
Clock changes for 2023.04-rc1 This contains various fixes and small features. I've included a reset patch as well since it was in the same series as a clock patch.
-
https://source.denx.de/u-boot/custodians/u-boot-mpc8xxTom Rini authored
- A fix for a long standing bug that has been exposed by commit 50128aeb ("cyclic: get rid of cyclic_init()") preventing 8xx boards from booting since u-boot 2023.01 - A GPIO driver for powerpc 8xx chip - Fixup for powerpc 8xx SPI driver - A new powerpc 8xx board - The two devices having that board.
-
This allows devm_reset_control_get(dev, NULL) to work and get the first reset control, which is common in code ported from Linux. Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
-
