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So far cache operations are only applied on the submission queue and completion queue, but they are missing in other places like identify and block read/write routines. In order to correctly operate on the caches, the DMA buffer passed to identify routine must be allocated properly on the stack with the existing macro ALLOC_CACHE_ALIGN_BUFFER(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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