Commit 014414f5 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Hans de Goede
Browse files

ARM: sunxi: Enable PSCI for sun8i



sun8i uses the same PSCI backend as sun6i, without power clamps.
Since there is no secure SRAM, the backend is placed at the end
of DRAM.
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Acked-by: default avatarHans de Goede <hdegoede@redhat.com>
Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
parent 98167430
......@@ -53,14 +53,20 @@ config MACH_SUN7I
config MACH_SUN8I_A23
bool "sun8i (Allwinner A23)"
select CPU_V7
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
config MACH_SUN8I_A33
bool "sun8i (Allwinner A33)"
select CPU_V7
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
config MACH_SUN9I
bool "sun9i (Allwinner A80)"
......
......@@ -20,11 +20,17 @@
#define CONFIG_SUNXI_USB_PHYS 2
#define CONFIG_ARMV7_PSCI 1
#if defined(CONFIG_MACH_SUN8I_A23)
#define CONFIG_ARMV7_PSCI_NR_CPUS 2
#define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18}
#elif defined(CONFIG_MACH_SUN8I_A33)
#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#define CONFIG_NAND_SUNXI_GPC_PORTS {16}
#else
#error Unsupported sun8i variant
#endif
#define CONFIG_TIMER_CLK_FREQ 24000000
/*
* Include common sunxi configuration where most the settings are
......
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