Commit 275a4490 authored by Tom Rini's avatar Tom Rini
Browse files

Merge branch '2021-04-22-udoo_neo-update'

- Update the udoo_neo platform for DM support
parents 842d049b d410dc88
Pipeline #7251 passed with stages
in 111 minutes and 32 seconds
......@@ -776,7 +776,10 @@ dtb-$(CONFIG_MX6SLL) += imx6sll-evk.dtb
dtb-$(CONFIG_MX6SX) += \
imx6sx-sabreauto.dtb \
imx6sx-sdb.dtb \
imx6sx-softing-vining-2000.dtb
imx6sx-softing-vining-2000.dtb \
imx6sx-udoo-neo-basic.dtb \
imx6sx-udoo-neo-extended.dtb \
imx6sx-udoo-neo-full.dtb
dtb-$(CONFIG_MX6UL) += \
imx6ul-geam.dtb \
......
This diff is collapsed.
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
*/
/dts-v1/;
#include "imx6sx-udoo-neo.dtsi"
/ {
model = "UDOO Neo Basic";
compatible = "udoo,neobasic", "fsl,imx6sx";
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>;
};
};
&fec1 {
phy-handle = <&ethphy1>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
};
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
*/
/dts-v1/;
#include "imx6sx-udoo-neo.dtsi"
/ {
model = "UDOO Neo Extended";
compatible = "udoo,neoextended", "fsl,imx6sx";
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
};
&i2c4 { /* Onboard Motion sensors */
status = "okay";
};
&uart3 { /* Bluetooth */
status = "okay";
};
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
*/
/dts-v1/;
#include "imx6sx-udoo-neo.dtsi"
/ {
model = "UDOO Neo Full";
compatible = "udoo,neofull", "fsl,imx6sx";
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
};
&fec1 {
phy-handle = <&ethphy1>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
};
&i2c4 { /* Onboard Motion sensors */
status = "okay";
};
&uart3 { /* Bluetooth */
status = "okay";
};
// SPDX-License-Identifier: GPL-2.0+
/ {
aliases {
mmc0 = &usdhc2;
};
};
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
*/
#include "imx6sx.dtsi"
/ {
compatible = "fsl,imx6sx";
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
red {
label = "udoo-neo:red:mmc";
gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "mmc0";
};
orange {
label = "udoo-neo:orange:user";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
default-state = "keep";
};
};
reg_sdio_pwr: regulator-sdio-pwr {
compatible = "regulator-fixed";
gpio = <&gpio6 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-name = "SDIO_PWR";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_otg1_reg>;
regulator-name = "usb_otg1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_otg2_reg>;
regulator-name = "usb_otg2_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_wlan: regulator-wlan {
compatible = "regulator-fixed";
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
startup-delay-us = <70000>;
enable-active-high;
};
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
phy-mode = "rmii";
phy-reset-duration = <10>;
phy-reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
clock-frequency = <100000>;
status = "okay";
pmic: pmic@8 {
compatible = "fsl,pfuze3000";
reg = <0x08>;
regulators {
sw1a_reg: sw1a {
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1475000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw1c_reg: sw1b {
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1475000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw2_reg: sw2 {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1850000>;
regulator-boot-on;
regulator-always-on;
};
sw3a_reg: sw3 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1650000>;
regulator-boot-on;
regulator-always-on;
};
swbst_reg: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
};
snvs_reg: vsnvs {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-always-on;
};
vref_reg: vrefddr {
regulator-boot-on;
regulator-always-on;
};
vgen1_reg: vldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen2_reg: vldo2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
};
vgen3_reg: vccsd {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen4_reg: v33 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen5_reg: vldo3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen6_reg: vldo4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
};
&i2c2 { /* Brick snap in sensors connector */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
clock-frequency = <100000>;
status = "okay";
};
&i2c4 { /* Onboard Motion sensors */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4>;
clock-frequency = <100000>;
status = "disabled";
};
&iomuxc {
pinctrl_bt_reg: btreggrp {
fsl,pins =
<MX6SX_PAD_KEY_ROW2__GPIO2_IO_17 0x15059>;
};
pinctrl_enet1: enet1grp {
fsl,pins =
<MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0xa0b1>,
<MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1>,
<MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1>,
<MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1>,
<MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1>,
<MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1>,
<MX6SX_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x3081>,
<MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9 0x3081>,
<MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081>,
<MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081>,
<MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081>,
<MX6SX_PAD_RGMII1_RXC__ENET1_RX_ER 0x3081>,
<MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins =
<MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1>,
<MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins =
<MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1>,
<MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1>;
};
pinctrl_i2c4: i2c4grp {
fsl,pins =
<MX6SX_PAD_USB_H_DATA__I2C4_SDA 0x4001b8b1>,
<MX6SX_PAD_USB_H_STROBE__I2C4_SCL 0x4001b8b1>;
};
pinctrl_uart1: uart1grp {
fsl,pins =
<MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1>,
<MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX 0x1b0b1>;
};
pinctrl_uart2: uart2grp {
fsl,pins =
<MX6SX_PAD_GPIO1_IO06__UART2_DCE_TX 0x1b0b1>,
<MX6SX_PAD_GPIO1_IO07__UART2_DCE_RX 0x1b0b1>;
};
pinctrl_uart3: uart3grp {
fsl,pins =
<MX6SX_PAD_SD3_DATA4__UART3_DCE_RX 0x13059>,
<MX6SX_PAD_SD3_DATA5__UART3_DCE_TX 0x13059>,
<MX6SX_PAD_SD3_DATA6__UART3_DCE_RTS 0x13059>,
<MX6SX_PAD_SD3_DATA7__UART3_DCE_CTS 0x13059>;
};
pinctrl_uart5: uart5grp {
fsl,pins =
<MX6SX_PAD_SD4_DATA4__UART5_DCE_RX 0x1b0b1>,
<MX6SX_PAD_SD4_DATA5__UART5_DCE_TX 0x1b0b1>;
};
pinctrl_uart6: uart6grp {
fsl,pins =
<MX6SX_PAD_CSI_DATA00__UART6_RI_B 0x1b0b1>,
<MX6SX_PAD_CSI_DATA01__UART6_DSR_B 0x1b0b1>,
<MX6SX_PAD_CSI_DATA02__UART6_DTR_B 0x1b0b1>,
<MX6SX_PAD_CSI_DATA03__UART6_DCD_B 0x1b0b1>,
<MX6SX_PAD_CSI_DATA04__UART6_DCE_RX 0x1b0b1>,
<MX6SX_PAD_CSI_DATA05__UART6_DCE_TX 0x1b0b1>,
<MX6SX_PAD_CSI_DATA06__UART6_DCE_RTS 0x1b0b1>,
<MX6SX_PAD_CSI_DATA07__UART6_DCE_CTS 0x1b0b1>;
};
pinctrl_otg1_reg: otg1grp {
fsl,pins =
<MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0>;
};
pinctrl_otg2_reg: otg2grp {
fsl,pins =
<MX6SX_PAD_NAND_RE_B__GPIO4_IO_12 0x10b0>;
};
pinctrl_usb_otg1: usbotg1grp {
fsl,pins =
<MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059>,
<MX6SX_PAD_GPIO1_IO08__USB_OTG1_OC 0x10b0>;
};
pinctrl_usb_otg2: usbot2ggrp {
fsl,pins =
<MX6SX_PAD_QSPI1A_DATA0__USB_OTG2_OC 0x10b0>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins =
<MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059>,
<MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059>,
<MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059>,
<MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059>,
<MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059>,
<MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059>,
<MX6SX_PAD_SD1_DATA0__GPIO6_IO_2 0x17059>; /* CD */
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins =
<MX6SX_PAD_KEY_COL2__GPIO2_IO_12 0x15059>,
<MX6SX_PAD_KEY_ROW1__GPIO2_IO_16 0x13059>,
<MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17069>,
<MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17069>,
<MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17069>,
<MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17069>,
<MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17069>,
<MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10069>,
<MX6SX_PAD_CSI_MCLK__OSC32K_32K_OUT 0x10059>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
/* Cortex-M4 serial */
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "disabled";
};
&uart3 { /* Bluetooth - only on Extended/Full versions */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
uart-has-rtscts;
status = "disabled";
bluetooth {
compatible = "ti,wl1831-st";
enable-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_bt_reg>;
max-speed = <921600>;
};
};
/* Arduino serial */
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "disabled";
};
&uart6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart6>;
uart-has-rtscts;
status = "disabled";
};
&usbotg1 { /* J2 micro USB port */
vbus-supply = <&reg_usb_otg1_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg1>;
status = "okay";
};
&usbotg2 { /* J3 host USB port */
vbus-supply = <&reg_usb_otg2_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg2>;
dr_mode = "host";
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
vmmc-supply = <&reg_sdio_pwr>;
bus-width = <4>;
cd-gpios = <&gpio6 2 GPIO_ACTIVE_LOW>;
no-1-8-v;
keep-power-in-suspend;
wakeup-source;
status = "okay";
};
&usdhc3 { /* Wi-Fi */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
non-removable;
vmmc-supply = <&reg_wlan>;
cap-power-off-card;
wakeup-source;
keep-power-in-suspend;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
wlcore: wlcore@2 {
compatible = "ti,wl1831";
reg = <2>;
interrupt-parent = <&gpio2>;
interrupts = <16 IRQ_TYPE_EDGE_RISING>;
ref-clock-frequency = <38400000>;
tcxo-clock-frequency = <26000000>;
};
};
......@@ -9,7 +9,6 @@
*/
#include <init.h>
#include <net.h>
#include <asm/arch/clock.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/imx-regs.h>
......@@ -18,9 +17,8 @@
#include <asm/global_data.h>
#include <asm/gpio.h>
#include <asm/mach-imx/iomux-v3.h>
#include <dm.h>
#include <env.h>
#include <mmc.h>
#include <fsl_esdhc_imx.h>
#include <asm/arch/crm_regs.h>
#include <asm/io.h>
#include <asm/mach-imx/mxc_i2c.h>
......@@ -30,8 +28,6 @@
#include <linux/sizes.h>
#include <common.h>
#include <i2c.h>
#include <miiphy.h>
#include <netdev.h>
#include <power/pmic.h>
#include <power/pfuze3000_pmic.h>
#include <malloc.h>
......@@ -218,34 +214,6 @@ static iomux_v3_cfg_t const uart1_pads[] = {
MX6_PAD_GPIO1_IO05__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
};
static iomux_v3_cfg_t const usdhc2_pads[] = {
MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DATA0__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DATA1__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DATA2__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DATA3__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
/* CD pin */
MX6_PAD_SD1_DATA0__GPIO6_IO_2 | MUX_PAD_CTRL(NO_PAD_CTRL),
/* Power */
MX6_PAD_SD1_CMD__GPIO6_IO_1 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
static iomux_v3_cfg_t const fec1_pads[] = {
MX6_PAD_ENET1_MDC__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET1_MDIO__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_RGMII1_RX_CTL__ENET1_RX_EN | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
MX6_PAD_RGMII1_RD0__ENET1_RX_DATA_0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
MX6_PAD_RGMII1_RD1__ENET1_RX_DATA_1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
MX6_PAD_RGMII1_TX_CTL__ENET1_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_RGMII1_RXC__ENET1_RX_ER | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
MX6_PAD_RGMII1_TD0__ENET1_TX_DATA_0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_RGMII1_TD1__ENET1_TX_DATA_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
MX6_PAD_ENET2_TX_CLK__GPIO2_IO_9 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
MX6_PAD_ENET1_CRS__GPIO2_IO_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
};
static iomux_v3_cfg_t const phy_control_pads[] = {
/* 25MHz Ethernet PHY Clock */
MX6_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M |
......@@ -272,7 +240,7 @@ static void setup_iomux_uart(void)
imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
}
static int setup_fec(int fec_id)
static int setup_fec(void)
{
struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
int reg;
......@@ -290,46 +258,7 @@ static int setup_fec(int fec_id)
reg |= BM_ANADIG_PLL_ENET_REF_25M_ENABLE;
writel(reg, &anatop->pll_enet);
return enable_fec_anatop_clock(fec_id, ENET_25MHZ);
}
int board_eth_init(struct bd_info *bis)
{
uint32_t base = IMX_FEC_BASE;
struct mii_dev *bus = NULL;
struct phy_device *phydev = NULL;
int ret;
imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));
setup_fec(CONFIG_FEC_ENET_DEV);
bus = fec_get_miibus(base, CONFIG_FEC_ENET_DEV);
if (!bus)
return -EINVAL;
phydev = phy_find_by_mask(bus, (0x1 << CONFIG_FEC_MXC_PHYADDR),
PHY_INTERFACE_MODE_RMII);
if (!phydev) {
free(bus);
return -EINVAL;
}
ret = fec_probe(bis, CONFIG_FEC_ENET_DEV, base, bus, phydev);
if (ret) {
free(bus);
free(phydev);
return ret;
}