Commit 2b1db7b1 authored by Michal Simek's avatar Michal Simek
Browse files

arm64: zynqmp: Wire GEM reset gpio



With ethernet-phy-id driver ETH phy reset can be properly handle that's why
describe it in DT.

Signed-off-by: default avatarMichal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5bfd92827033d19617113f4117f37dcf79699a0f.1662721547.git.michal.simek@amd.com
parent 13622c7a
......@@ -211,7 +211,7 @@
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
/* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
};
};
};
......
......@@ -120,6 +120,7 @@
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
};
};
};
......
......@@ -125,6 +125,7 @@
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
};
};
};
......
......@@ -183,6 +183,7 @@
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
reset-gpios = <&tca6416_u22 6 GPIO_ACTIVE_LOW>;
};
};
};
......
......@@ -180,6 +180,7 @@
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
reset-gpios = <&tca6416_u15 6 GPIO_ACTIVE_LOW>;
};
};
};
......
......@@ -187,6 +187,7 @@
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
reset-gpios = <&tca6416_u15 6 GPIO_ACTIVE_LOW>;
};
};
};
......
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