arm64: zynqmp: Wire GEM reset gpio

With ethernet-phy-id driver ETH phy reset can be properly handle that's why
describe it in DT.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5bfd92827033d19617113f4117f37dcf79699a0f.1662721547.git.michal.simek@amd.com

arch/arm/dts/zynqmp-zcu102-revA.dts

@@ -211,7 +211,7 @@
 			ti,tx-internal-delay = <0xa>;
 			ti,fifo-depth = <0x1>;
 			ti,dp83867-rxctrl-strap-quirk;
-			/* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
+			reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
 		};
 	};
 };

arch/arm/dts/zynqmp-zcu104-revA.dts

@@ -120,6 +120,7 @@
 			ti,tx-internal-delay = <0xa>;
 			ti,fifo-depth = <0x1>;
 			ti,dp83867-rxctrl-strap-quirk;
+			reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
 		};
 	};
 };

arch/arm/dts/zynqmp-zcu104-revC.dts

@@ -125,6 +125,7 @@
 			ti,tx-internal-delay = <0xa>;
 			ti,fifo-depth = <0x1>;
 			ti,dp83867-rxctrl-strap-quirk;
+			reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
 		};
 	};
 };

arch/arm/dts/zynqmp-zcu111-revA.dts

@@ -183,6 +183,7 @@
 			ti,tx-internal-delay = <0xa>;
 			ti,fifo-depth = <0x1>;
 			ti,dp83867-rxctrl-strap-quirk;
+			reset-gpios = <&tca6416_u22 6 GPIO_ACTIVE_LOW>;
 		};
 	};
 };

arch/arm/dts/zynqmp-zcu208-revA.dts

@@ -180,6 +180,7 @@
 			ti,tx-internal-delay = <0xa>;
 			ti,fifo-depth = <0x1>;
 			ti,dp83867-rxctrl-strap-quirk;
+			reset-gpios = <&tca6416_u15 6 GPIO_ACTIVE_LOW>;
 		};
 	};
 };

arch/arm/dts/zynqmp-zcu216-revA.dts

@@ -187,6 +187,7 @@
 			ti,tx-internal-delay = <0xa>;
 			ti,fifo-depth = <0x1>;
 			ti,dp83867-rxctrl-strap-quirk;
+			reset-gpios = <&tca6416_u15 6 GPIO_ACTIVE_LOW>;
 		};
 	};
 };