Commit 47df8f03 authored by York Sun's avatar York Sun Committed by Kumar Gala
Browse files

mpc8xxx: Enable ECC on/off control in hwconfig



Add fsl_ddr:ecc=on in hwconfig. If ECC is enabled in board configuration file,
ECC can be turned on/off by this switch. If this switch is omitted, it is ON by
default.

Updated hwconfig calls to use local buffer.

Syntax is
hwconfig=fsl_ddr:ecc=on
Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent dd127689
......@@ -98,10 +98,13 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
/* Operational Mode Paramters */
/* Pick ECC modes */
#ifdef CONFIG_DDR_ECC
popts->ECC_mode = 1; /* 0 = disabled, 1 = enabled */
#else
popts->ECC_mode = 0; /* 0 = disabled, 1 = enabled */
#ifdef CONFIG_DDR_ECC
if (hwconfig_sub_f("fsl_ddr", "ecc", buf)) {
if (hwconfig_subarg_cmp_f("fsl_ddr", "ecc", "on", buf))
popts->ECC_mode = 1;
} else
popts->ECC_mode = 1;
#endif
popts->ECC_init_using_memctl = 1; /* 0 = use DMA, 1 = use memctl */
......
......@@ -78,6 +78,13 @@ If the DDR controller supports address hashing, it can be enabled by hwconfig.
Syntax is:
hwconfig=fsl_ddr:addr_hash=true
Memory controller ECC on/off
============================
If ECC is enabled in board configuratoin file, i.e. #define CONFIG_DDR_ECC,
ECC can be turned on/off by hwconfig.
Syntax is
hwconfig=fsl_ddr:ecc=off
Memory testing options for mpc85xx
==================================
......
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