Commit 8c3dacff authored by Vishnu Patekar's avatar Vishnu Patekar Committed by Hans de Goede
Browse files

sunxi: Add basic A33 basic support



Enable full support for the A33 SoC including display, otg-usb, etc.
Signed-off-by: default avatarVishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Acked-by: default avatarIan Campbell <ijc@hellion.org.uk>
parent ffc0ae0c
......@@ -39,5 +39,6 @@ obj-$(CONFIG_MACH_SUN5I) += dram_sun4i.o
obj-$(CONFIG_MACH_SUN6I) += dram_sun6i.o
obj-$(CONFIG_MACH_SUN7I) += dram_sun4i.o
obj-$(CONFIG_MACH_SUN8I_A23) += dram_sun8i_a23.o
obj-$(CONFIG_MACH_SUN8I_A33) += dram_sun8i_a33.o
obj-y += fel_utils.o
endif
......@@ -66,6 +66,8 @@ int print_cpuinfo(void)
puts("CPU: Allwinner A20 (SUN7I)\n");
#elif defined CONFIG_MACH_SUN8I_A23
puts("CPU: Allwinner A23 (SUN8I)\n");
#elif defined CONFIG_MACH_SUN8I_A33
puts("CPU: Allwinner A33 (SUN8I)\n");
#else
#warning Please update cpu_info.c with correct CPU information
puts("CPU: SUNXI Family\n");
......
......@@ -28,7 +28,11 @@
#endif
#define SUNXI_USB_PMU_IRQ_ENABLE 0x800
#ifdef CONFIG_MACH_SUN8I_A33
#define SUNXI_USB_CSR 0x410
#else
#define SUNXI_USB_CSR 0x404
#endif
#define SUNXI_USB_PASSBY_EN 1
#define SUNXI_EHCI_AHB_ICHR8_EN (1 << 10)
......@@ -103,6 +107,11 @@ static void usb_phy_write(struct sunxi_usbc_hcd *sunxi_usbc, int addr,
int j = 0, usbc_bit = 0;
void *dest = sunxi_usbc_get_io_base(0) + SUNXI_USB_CSR;
#ifdef CONFIG_MACH_SUN8I_A33
/* CSR needs to be explicitly initialized to 0 on A33 */
writel(0, dest);
#endif
usbc_bit = 1 << (sunxi_usbc->id * 2);
for (j = 0; j < len; j++) {
/* set the bit address to be written */
......
......@@ -52,6 +52,12 @@ config MACH_SUN8I_A23
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
config MACH_SUN8I_A33
bool "sun8i (Allwinner A33)"
select CPU_V7
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
endchoice
# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
......
......@@ -458,8 +458,13 @@ static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase)
static inline u8 musb_read_configdata(void __iomem *mbase)
{
#ifdef CONFIG_MACH_SUN8I_A33
/* <Sigh> allwinner saves a reg, and we need to hardcode this */
return 0xde;
#else
musb_writeb(mbase, MUSB_INDEX, 0);
return musb_readb(mbase, 0x10 + MUSB_CONFIGDATA);
#endif
}
static inline u16 musb_read_hwvers(void __iomem *mbase)
......
......@@ -947,6 +947,9 @@ static void sunxi_drc_init(void)
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
/* On sun6i the drc must be clocked even when in pass-through mode */
#ifdef CONFIG_MACH_SUN8I_A33
setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_SAT);
#endif
setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_DRC0);
clock_set_de_mod_clock(&ccm->iep_drc0_clk_cfg, 300000000);
#endif
......
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