Commit a0aba8a2 authored by Trevor Woerner's avatar Trevor Woerner Committed by Tom Rini
Browse files

CONFIG_SYS_[DI]CACHE_OFF: convert to Kconfig



CONFIG_SYS_[DI]CACHE_OFF had been partially converted to Kconfig
parameters; only for the ARC architecture. This patch turns these two
parameters into Kconfig items everywhere else they are found.

All of the include/configs/* and defconfig changes in this patch are
for arm machines only. The Kconfig changes for arc, nds32, riscv,
and xtensa have been included since these symbols are found in code
under arch/{arc,nds32,riscv,xtensa}, however, no currently-defined
include/configs/* or defconfigs for these architectures exist which
include these symbols.

These results have been confirmed with tools/moveconfig.py.
Acked-by: default avatarAlexey Brodkin <abrodkin@snopsys.com>
Signed-off-by: default avatarTrevor Woerner <trevor@toganlabs.com>
[trini: Re-migrate for a few more boards]
Signed-off-by: Tom Rini's avatarTom Rini <trini@konsulko.com>
parent c5091c5f
......@@ -634,8 +634,6 @@ The following options need to be configured:
the defaults discussed just above.
- Cache Configuration:
CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
- Cache Configuration for ARM:
......
......@@ -109,12 +109,16 @@ config CPU_BIG_ENDIAN
Build kernel for Big Endian Mode of ARC CPU
config SYS_ICACHE_OFF
bool "Do not use Instruction Cache"
bool "Do not enable icache"
default n
help
Do not enable instruction cache in U-Boot.
config SYS_DCACHE_OFF
bool "Do not use Data Cache"
bool "Do not enable dcache"
default n
help
Do not enable data cache in U-Boot.
menuconfig ARC_DBG
bool "ARC debugging"
......
......@@ -74,6 +74,18 @@ config ARM_ASM_UNIFIED
config THUMB2_KERNEL
bool
config SYS_ICACHE_OFF
bool "Do not enable icache"
default n
help
Do not enable instruction cache in U-Boot.
config SYS_DCACHE_OFF
bool "Do not enable dcache"
default n
help
Do not enable data cache in U-Boot.
config SYS_ARM_CACHE_CP15
bool "CP15 based cache enabling support"
help
......
......@@ -26,12 +26,6 @@
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */
/*
* Disable the dcache. Currently the network driver (mvgbe.c) and USB
* EHCI driver (ehci-marvell.c) and possibly others rely on the data
* cache being disabled.
*/
#define CONFIG_SYS_DCACHE_OFF
/*
* By default kwbimage.cfg from board specific folder is used
......
......@@ -16,6 +16,18 @@ config TARGET_ADP_AE3XX
endchoice
config SYS_ICACHE_OFF
bool "Do not enable icache"
default n
help
Do not enable instruction cache in U-Boot.
config SYS_DCACHE_OFF
bool "Do not enable dcache"
default n
help
Do not enable data cache in U-Boot.
source "board/AndesTech/adp-ag101p/Kconfig"
source "board/AndesTech/adp-ae3xx/Kconfig"
......
......@@ -19,6 +19,18 @@ config TARGET_SIFIVE_FU540
endchoice
config SYS_ICACHE_OFF
bool "Do not enable icache"
default n
help
Do not enable instruction cache in U-Boot.
config SYS_DCACHE_OFF
bool "Do not enable dcache"
default n
help
Do not enable data cache in U-Boot.
# board-specific options below
source "board/AndesTech/ax25-ae350/Kconfig"
source "board/emulation/qemu-riscv/Kconfig"
......
......@@ -16,6 +16,18 @@ config TARGET_XTFPGA
endchoice
config SYS_ICACHE_OFF
bool "Do not enable icache"
default n
help
Do not enable instruction cache in U-Boot.
config SYS_DCACHE_OFF
bool "Do not enable dcache"
default n
help
Do not enable data cache in U-Boot.
source "board/cadence/xtfpga/Kconfig"
endmenu
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x00600000
CONFIG_TARGET_SBx81LIFKW=y
......
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x00600000
CONFIG_TARGET_SBx81LIFXCAT=y
......
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0xE80C0000
......
CONFIG_ARM=y
CONFIG_SYS_ICACHE_OFF=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
CONFIG_TARGET_BCM23550_W1D=y
CONFIG_SYS_TEXT_BASE=0x9f000000
......
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_TARGET_COLIBRI_PXA270=y
CONFIG_SYS_TEXT_BASE=0x0
CONFIG_NR_DRAM_BANKS=1
......
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_NET2BIG_V2=y
......
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
......
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
......
CONFIG_ARM=y
CONFIG_SYS_ICACHE_OFF=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_LPC32XX=y
CONFIG_SYS_TEXT_BASE=0x83F00000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
......
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_DNS325=y
......
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_DOCKSTAR=y
......
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_DREAMPLUG=y
......
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_DS109=y
......
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