- 06 Dec, 2019 1 commit
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Add support for setting linux,usable-memory property in the memory node of device tree for the kernel [1]. This property holds a base address and size, describing a limited region in which memory may be considered available for use by the kernel. Memory outside of this range is not available for use. [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/chosen.txt Signed-off-by:
Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by:
Stefan Agner <stefan.agner@toradex.com> Reviewed-by:
Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
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- 13 Apr, 2019 2 commits
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Use ext4 file system by default. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Acked-by:
Max Krummenacher <max.krummenacher@toradex.com> Acked-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Use ext4 file system by default. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Acked-by:
Max Krummenacher <max.krummenacher@toradex.com> Acked-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com>
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- 10 May, 2018 1 commit
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Trying to boot from an ext4 rootfs fails due to us defaulting to ext3. While the downstream T20/T30 L4T kernel has issues with ext4 later TK1 L4T should work just fine with it. Hence enable ext4 for sdboot and usbboot on TK1. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Acked-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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- 12 Jul, 2017 1 commit
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Stefano Babic authored
Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by:
Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by:
Christian Gmeiner <christian.gmeiner@gmail.com>
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- 14 Apr, 2017 6 commits
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The Vybrid SoC family has the same display controller unit (DCU) like the LS1021A SoC. This patch adds platform data, pinmux defines and clock control to enable the driver for Toradex Colibri Vybrid module. Signed-off-by:
Stefan Agner <stefan.agner@toradex.com> Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by:
Stefano Babic <sbabic@denx.de>
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Add common widescreen modes 800x480 and 1024x600. Signed-off-by:
Stefan Agner <stefan.agner@toradex.com> Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by:
Alison Wang <alison.wang@nxp.com>
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DCU_LAYER_MAX_NUM is currently used for DCU_MODE_BLEND_ITER and it actually overflows the maximum value of BLEND_ITER for Vybrid and LS102XA. Fix this by using a default value of 2. Signed-off-by:
Stefan Agner <stefan.agner@toradex.com> Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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When enabling the DCU and pixel clock, the test mode is activated since this is the reset configuration. The test mode immediately shows a red screen on a LCD. A moment later, the DCU gets initialized properly. This patch enables the pixel clock after initialization of the DCU control register. This avoids this initial flicker on LCD screens. While at it change the polarity of pixel clock to display samples data on the rising edge. Signed-off-by:
Stefan Agner <stefan.agner@toradex.com> Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by:
Alison Wang <alison.wang@nxp.com>
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Fix the framebuffer location to the very end of the available memory. This allows to remove the area from available memory for the kernel, which in turn allows to display the splash screen through the Linux kernel boot process. Ideas has been taken from the sunxi display driver, e.g. 20779ec3 ("sunxi: video: Dynamically reserve framebuffer memory") Signed-off-by:
Stefan Agner <stefan.agner@toradex.com> Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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Rename CONFIG_FSL_DCU_FB to CONFIG_VIDEO_FSL_DCU_FB and convert it to Kconfig. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by:
Stefan Agner <stefan.agner@toradex.com> Reviewed-by:
Alison Wang <alison.wang@nxp.com>
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- 16 Dec, 2016 1 commit
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u-boot allows modifying a device tree after it is loaded into memory. Add fdt_fixup hook in u-boot environment which can facilitate such modifications. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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- 29 Nov, 2016 1 commit
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Our update scripts write the kernel and device tree in seperate UBI volumes. This allows to use a lot less UBI/UBIFS support in U-Boot, which should lower the risk of hitting bugs in this area. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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- 27 Sep, 2016 5 commits
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Enable USB driver model for Toradex Colibri Vybrid modules. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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Enable USB device tree node for Toradex Colibri Vybrid module. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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Add device tree node for USB peripheral on Vybrid. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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Add driver model support for Vybrid USB driver. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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Without this, if g_dnl_register() fails, DFU code continues on blindly and crashes. This fix makes it simply print an error message instead. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> [l.majewski@samsung.com - some manual tweaks needed]
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- 16 Jan, 2016 2 commits
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Add board_usb_phy_mode weak function on similar lines to ehci-mx6. However since Vybrid USB does not have a true OTG, make this weak functon just return 0. The function is supposed to be implemented by the individual boards using a GPIO for providing the OTG pin functionality. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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The current ehci-vf USB driver for Vybrid hardcodes the USB host and client functionality. Remove this. Reported-by:
Santhosh Kumar Janardhanam <santhosh.kj@hcl.com> Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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- 25 Nov, 2015 1 commit
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Add board_usb_phy_mode function for detecting whether a port is being used as host or client using a GPIO. On Colibri Vybrid we provide GPIO 102 for this very same purpose. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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- 12 Nov, 2015 1 commit
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Compile misc.c for mx7, since we need related function for lcdif and nand. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Sanchayan Maity <maitysanchayan@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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- 03 Jul, 2015 1 commit
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Increase console IO buffer size to 1024 from the previous value of 256. The previous value was too short for editing environment variables like ubiboot from the console. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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- 08 Jun, 2015 2 commits
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Add IOMUX for the pad used as USB pen. This needs to be driven low for the Iris and Viola boards where it is pulled up high by default. This is required for the USB host functionality to work on these boards. Use the board specific weak initialisation function, to drive the pin low which would be called on "usb start". Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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Add a weak function board_ehci_hcd_init which can be used by the board file for board specific initialisation. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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- 23 Apr, 2015 7 commits
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Enable USB support on Toradex Colibri Vybrid Modules. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Acked-by:
Marek Vasut <marex@denx.de>
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This driver adds support for the USB peripheral on Freescale Vybrid SoC's. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Acked-by:
Stefan Agner <stefan@agner.ch>
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Enables caches which provides a rather huge speedup of the boot loader. Also mark the on-chip RAM as cachable since this is the area U-Boot runs from. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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Vybrid product family consists of several rather similar SoC which can be determined by softare during boot time. This allows use of variable ${soc} for Linux device tree files. Detect VF5xx CPU's by reading the CPU count register. We can determine the second number of the CPU type (VF6x0) which indicates the presence of a L2 cache. Signed-off-by:
Stefan Agner <stefan@agner.ch> Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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Enable the SCSC (Slow Clock Source Controller) and select the external 32KHz oscillator. This improves the accuracy of the RTC. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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In order to avoid code duplication, move the DDR3 initialization to the common place under imx-common. Currently ROW_DIFF and COL_DIFF can be chosen from the board file. The JEDEC timings are specified using a common ddr3_jedec_timings structure. Signed-off-by:
Stefan Agner <stefan@agner.ch> Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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- 27 Nov, 2014 1 commit
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Sanchayan Maity authored
This patch disables subpage writes for vf610_nfc nand driver. This is required, as without this fix, writing unaligned u-boot images with DFU results in a hang. Trying to write unalgined binary images also results in a hang, without disabling subpage writes. Patch has been tested on a Colibri VF61 module. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com>
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