Signed-off-by: Tom Rini <trini@konsulko.com>

- Fixes DDR initialization failure on PowerPC boards like P3041DS,
  P4080DS

Fixes segfault in 'dm drivers' command

Biwen Li authored Apr 09, 2020 and Priyanka Jain committed Apr 10, 2020

This reverts commit 2a5d5d27

.
The commit breaks uboot boot (hang in ddr init)
on many PowerPC boards like P3041DS, P4080DS
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>

- doc: fix code examples in qemu-mips.rst
- mips: vcoreiii: fix memtest and cache coherency issues
- cmd/go: fix cache coherency issues on MIPS

Ovidiu Panait authored Apr 05, 2020 and Simon Glass committed Apr 09, 2020

Refactor the printing sequence in dm_dump_drivers to make it more clear.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>

Ovidiu Panait authored Apr 05, 2020 and Simon Glass committed Apr 09, 2020

Currently, dm drivers command produces a segfault:
=> dm drivers
Driver                Compatible
--------------------------------
Segmentation fault (core dumped)

This is caused by a NULL pointer dereference of entry->of_match.
Add a check to prevent this.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>

Marek Vasut authored Apr 06, 2020 and Tom Rini committed Apr 09, 2020

Rather than keeping the asynchronous schedule running always, keep it
running only across USB mass storage transfers for now, as it seems
that keeping it running all the time interferes with certain control
transfers during device enumeration.

Note that running the async schedule all the time should not be an
issue, especially on EHCI HCD, as that one implements most of the
transfers using async schedule.

Note that we have usb_disable_asynch(), which however is utterly broken.
The usb_disable_asynch() blocks the USB core from doing async transfers
by setting a global flag. The async schedule should however be disabled
per USB controller. Moreover, setting a global flag does not prevent the
controller from using the async schedule, which e.g. the EHCI HCD does.

This patch implements additional callback to the controller, which
permits it to lock the async schedule and keep it running across
multiple transfers. Once the schedule is unlocked, it must also be
disabled. This thus prevents the async schedule from running outside
of the USB mass storage transfers.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Tom Rini <trini@konsulko.com> [omap3_beagle, previously failing]

Ye Li authored Apr 09, 2020 and Tom Rini committed Apr 09, 2020

The FIT config node has reversed ATF and u-boot: ATF is set to 'firmware' but
u-boot is set to 'loadables'.
This script can work previously because spl fit driver wrongly appends fdt to
all loadable images. With the issue fixed in commit 9d15d1d1

 ("Revert
"common: spl_fit: Default to IH_OS_U_BOOT if FIT_IMAGE_TINY enabled"") the
u-boot in 'loadables' does not have fdt appended and fails to work.  So correct
the script by moving u-boot to 'firmware' and ATF to 'loadables'.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reported-by: Matt Porter <mporter@konsulko.com>
Tested-by: Matt Porter <mporter@konsulko.com>

Stefan Roese authored Feb 13, 2020 and Daniel Schwierzeck committed Apr 09, 2020

It has been noticed on MT7628/88 platforms, that booting the RAM image
does not work reliably. Sometimes it works and sometimes not. Debugging
showed that this "might" be a cache related issue as very strange
errors occurred (e.g. output corrupted etc).

This patch adds a cache flush for the complete SDRAM area to the go cmd
before jumping to the entry point for the MIPS architecture. The
complete area is flushed as we don't know at this point, how big the
area of the "application" really is.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Mauro Condarelli <mc5686@mclink.it>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Mauro Condarelli <mc5686@mclink.it>
Cc: Weijie Gao <weijie.gao@mediatek.com>

Lars Povlsen authored Feb 06, 2020 and Daniel Schwierzeck committed Apr 09, 2020

This patch fixes an stability issue seen on some vcoreiii targets,
which was root caused to a cache inconsistency situation.

The inconsistency was caused by having kuseg pointing to NOR area but
used as a stack/gd/heap area during initialization, while only
relatively late remapping the RAM area into kuseg position.

The fix is to initialize the DDR right after the TLB setup, and then
remapping it into position before gd/stack/heap usage.
Reported-by: Ramin Seyed-Moussavi <ramin.moussavi@yacoub.de>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>

Lars Povlsen authored Feb 06, 2020 and Daniel Schwierzeck committed Apr 09, 2020

This patch ajust CONFIG_SYS_MEMTEST_END for vcoreiii-based systems to
avoid overwriting the relocated u-boot. The former setting was too
agressive with networking etc. enabled on some platforms.
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>

Heinrich Schuchardt authored Jan 01, 2020 and Daniel Schwierzeck committed Apr 09, 2020

Code sections should be syntax highlighted as bash.
Comment lines in code should start with a hash sign ('#') but code lines
should not.
Most commands can be executed as normal users. Prepend those commands
requiring elevated authorization with 'sudo'.
dd does not have a parameter cout.
sfdisk does not have a -C parameter on Debian Buster.
Provide the necessary input to sfdisk.
Creating a partition of length zero makes no sense.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

Alex Nemirovsky authored Dec 23, 2019 and Daniel Schwierzeck committed Apr 09, 2020

Allow SoC or board layers with reconfigurable cpu clocks
capabilties to do implementation specific lookups and service
get_tbclk() requests.
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>

Alex Nemirovsky authored Dec 23, 2019 and Daniel Schwierzeck committed Apr 09, 2020

Useful in custom HW designs which have a need to flush dcache
range in a completely non standard way.
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>

Sean Anderson authored Apr 06, 2020 and Tom Rini committed Apr 09, 2020

Add a test for the dm drivers command. Also fix a null pointer dereference
revealed by said test.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Fixes for 2020.04
-----------------

- mx7dsabre: Fix ramdisk_addr* for distro boot
- Toradex boards

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/671988124

Jan Kiszka authored Mar 16, 2020 and Stefano Babic committed Apr 07, 2020

Overlapped with fdt_addr*, thus corrupted the latter when using both.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

Igor Opaniuk authored Mar 27, 2020 and Stefano Babic committed Apr 07, 2020

pd_dma_* nodes should be accessible during pre-relocation stage of
U-Boot proper for properly handling power domains.

This fixes the issue with permanent failing of invocation of
power_domain_get_by_index() in the common code of DM power domain
uclass (drivers/power/domain/power-domain-uclass.c).

Fixes: f0cc4eae

 ("core: device: use dev_power_domain_on")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>

Igor Opaniuk authored Mar 27, 2020 and Stefano Babic committed Apr 07, 2020

pd_dma_* nodes should be accessible during pre-relocation stage of
U-Boot proper for properly handling power domains.

This fixes the issue with permanent failing of invocation of
power_domain_get_by_index() in the common code of DM power domain
uclass (drivers/power/domain/power-domain-uclass.c).

Fixes: f0cc4eae

 ("core: device: use dev_power_domain_on")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>

Igor Opaniuk authored Mar 27, 2020 and Stefano Babic committed Apr 07, 2020

For non-SPL/TPL setups dm-spl, dm-tpl, dm-pre-proper, dm-pre-reloc are
handled equally, forcing the nodes with these properties
to be accessible and device being probed
before pre-relocation of U-Boot proper (drivers/core/util.c):

bool ofnode_pre_reloc(ofnode node)
{
    /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass
     * had property dm-pre-reloc or u-boot,dm-spl/tpl.
     * They are removed in final dtb (fdtgrep 2nd pass)
     */
    return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-reloc"))
        return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-proper"))
        return true;

    /*
     * In regular builds individual spl and tpl handling both
     * count as handled pre-relocation for later second init.
     */
    if (ofnode_read_bool(node, "u-boot,dm-spl") ||
        ofnode_read_bool(node, "u-boot,dm-tpl"))
        return true;

    return false;
}

Howewer, to avoid confusion in future, replace dm-spl
`%s/dm-spl/dm-pre-proper/g` properties to dm-pre-proper
to explicitly state that they are handled during pre-relocation
stage of U-Boot proper.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>

Igor Opaniuk authored Mar 27, 2020 and Stefano Babic committed Apr 07, 2020

For non-SPL/TPL setups dm-spl, dm-tpl, dm-pre-proper, dm-pre-reloc are
handled equally, forcing the nodes with these properties
to be accessible and device being probed
before pre-relocation of U-Boot proper (drivers/core/util.c):

bool ofnode_pre_reloc(ofnode node)
{
    /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass
     * had property dm-pre-reloc or u-boot,dm-spl/tpl.
     * They are removed in final dtb (fdtgrep 2nd pass)
     */
    return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-reloc"))
        return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-proper"))
        return true;

    /*
     * In regular builds individual spl and tpl handling both
     * count as handled pre-relocation for later second init.
     */
    if (ofnode_read_bool(node, "u-boot,dm-spl") ||
        ofnode_read_bool(node, "u-boot,dm-tpl"))
        return true;

    return false;
}

Howewer, to avoid confusion in future, replace dm-spl
`%s/dm-spl/dm-pre-proper/g` properties to dm-pre-proper
to explicitly state that they are handled during pre-relocation
stage of U-Boot proper.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>

Igor Opaniuk authored Mar 27, 2020 and Stefano Babic committed Apr 07, 2020

This fixes the issue when PHY auto negotiation never completes.

Fixes: 431cd76d

("colibri_imx6: migrate to DM_ETH")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>

Signed-off-by: Tom Rini <trini@konsulko.com>

Chee Hong Ang authored Mar 09, 2020 and Tom Rini committed Apr 05, 2020

This commit (82de42fa

) calls child's
ofdata_to_platdata() method before the parent is probed in dm core.
This has caused the driver no longer able to get the correct parent
clock's register base in the ofdata_to_platdata() method because the
parent clocks will only be probed after the child's ofdata_to_platdata().
To resolve this, the clock parent's register base will only be retrieved
by the child in probe() method instead of ofdata_to_platdata().
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>

Marek Vasut authored Apr 02, 2020 and Tom Rini committed Apr 05, 2020

The card-detect GPIO and any other GPIO access currently doesn't work in
U-Boot SPL on any STM32 platform and crashes the SPL. To work around this
problem on AV96 right before release, remove the cd-gpios from DT. This
patch must be reverted right after release, once the proper fix for the
GPIO driver, "gpio: stm32: support gpio ops in SPL", is applied.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

- net: sh_eth: Init the hardware before PHY access

- verdin-imx8mm board reST documentation update
- Intel Edison board ACPI table I2C/USB minor updates
- Fix a regression of ns16550 serial driver that breaks Intel Edison

Currently the driver gets ns16550 base address in the driver
probe() routine, which may potentially break any ns16550 wrapper
driver that does additional initialization before calling
ns16550_serial_probe().

Things are complicated that we need consider ns16550 devices on
both simple-bus and PCI bus. To fix the issue we move the base
address assignment for simple-bus ns16550 device back to the
ofdata_to_platdata(), and assign base address for PCI ns16550
device in ns16550_serial_probe().

This is still not perfect. If any PCI bus based ns16550 wrapper
driver tries to access plat->base before calling probe(), it is
still subject to break.

Fixes: 720f9e1f

 ("serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()")
Reported-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>

Andy Shevchenko authored Mar 26, 2020 and Bin Meng committed Apr 04, 2020

USB 3 host controller may be described in ACPI to allow users alter
the properties or other features. Describe it for Intel Tangier SoC.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Andy Shevchenko authored Mar 20, 2020 and Bin Meng committed Apr 04, 2020

There is established way to provide I²C timings, or actually counters,
to the OS via ACPI. Fill them for Intel Merrifield platform.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Igor Opaniuk authored Mar 05, 2020 and Bin Meng committed Apr 04, 2020

1. Update build steps where mainline Trusted Firmware A is used.
2. Fix BL31_BASE to the proper one according to the SoC reference
manual.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Andy Shevchenko authored Feb 27, 2020 and Bin Meng committed Apr 04, 2020

There is no need to have an assignment to NULL for XSDT pointer.
Therefore, no need to assign it when rsdt_address is not set.
Because of above changes we may decrease indentation level as well.

While here, drop unnecessary parentheses.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

To access the PHY, the MAC registers must be initialized. Call the init
function in probe() to make it so, otherwise the PHY ID readout returns
all zeroes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

- Add support for Jetson Nano, plus miscellaneous other fixes found
  during Nano bringup.
- Add Igor's update_uboot wrapper patches.

Michal Simek authored Mar 30, 2020 and Tom Rini committed Apr 03, 2020

Commit f4dc714a ("arm64: Turn u-boot.bin back into an ELF file after
relocate-rela")
introduce REMAKE_ELF option to recreate u-boot.elf from u-boot ->
u-boot.bin + DT -> u-boot.elf.

The best is to ilustrate it from make V=1 output
  cat u-boot-nodtb.bin dts/dt.dtb > u-boot-dtb.bin
  cp u-boot-dtb.bin u-boot.bin
aarch64-linux-gnu-objcopy -I binary -B aarch64 -O elf64-littleaarch64  u-boot.bin u-boot-elf.o
  aarch64-linux-gnu-ld.bfd u-boot-elf.o -o u-boot.elf --defsym="_start"=0x8000000 -Ttext=0x8000000

Last command has no explicit linker script passed that's why toolchain
internal linker script is used.
In Binutils 2.32 case it contains SIZEOF_HEADERS symbol which has changed
behavior by commit
https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=64029e93683a266c38d19789e780f3748bd6a188
which result in situation that program headers has changed from
(xilinx_zynqmp_mini_defconfig)

Program Headers:
  Type           Offset             VirtAddr       ...

Jan-Christoph Tebbe authored Mar 16, 2020 and Tom Rini committed Apr 03, 2020

When generating the MAC address based on the boards serial number
the last digit was overwritten with the null termination. That way
boards with serial numbers close to each other would use the same
MAC address.
Signed-off-by: Jan-Christoph Tebbe <Jan-Christoph.Tebbe@ithinx.io>

Ye Li authored Apr 01, 2020 and Tom Rini committed Apr 03, 2020

Commit cf8dcc5d

 ("common: spl_fit: Default to IH_OS_U_BOOT if
FIT_IMAGE_TINY enabled") is not correct, it will append fdt to each loadable
image. Actually when using TINY FIT, the first loadable image is thought as
u-boot and already have fdt appended.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Fabio Estevam <festevam@gmail.com>

- fix for MMIO window size (Tudor Ambarus)

The Jetson Nano Developer Kit is a Tegra X1-based development board. It
is similar to Jetson TX1 but it is not pin compatible. It features 4GB
of LPDDR4, a SPI NOR flash for early boot firmware and an SD card slot
used for storage.

HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0
and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI
Ethernet controller provides onboard network connectivity. NVMe support
has also been added. Env save is at the end of QSPI (4MB-8K).

A 40-pin header on the board can be used to extend the capabilities and
exposed interfaces of the Jetson Nano.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>