• Catalin Marinas's avatar
    ARM: 5905/1: ARM: Global ASID allocation on SMP · 11805bcf
    Catalin Marinas authored
    The current ASID allocation algorithm doesn't ensure the notification
    of the other CPUs when the ASID rolls over. This may lead to two
    processes using the same ASID (but different generation) or multiple
    threads of the same process using different ASIDs.
    This patch adds the broadcasting of the ASID rollover event to the
    other CPUs. To avoid a race on multiple CPUs modifying "cpu_last_asid"
    during the handling of the broadcast, the ASID numbering now starts at
    "smp_processor_id() + 1". At rollover, the cpu_last_asid will be set
    to NR_CPUS.
    Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>