• David S. Miller's avatar
    [SPARC64]: Probe D/I/E-cache config and use. · 80dc0d6b
    David S. Miller authored
    
    
    At boot time, determine the D-cache, I-cache and E-cache size and
    line-size.  Use them in cache flushes when appropriate.
    
    This change was motivated by discovering that the D-cache on
    UltraSparc-IIIi and later are 64K not 32K, and the flushes done by the
    Cheetah error handlers were assuming a 32K size.
    
    There are still some pieces of code that are hard coding things and
    will need to be fixed up at some point.
    
    While we're here, fix the D-cache and I-cache parity error handlers
    to run with interrupts disabled, and when the trap occurs at trap
    level > 1 log the event via a counter displayed in /proc/cpuinfo.
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    80dc0d6b