- Mar 05, 2025
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Manikandan Muralidharan authored
Add default configuration for sd-card to boot the linux kernel. Signed-off-by:
Manikandan Muralidharan <manikandan.m@microchip.com>
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Manikandan Muralidharan authored
Add board specific functions for sam9x75 curiosity Signed-off-by:
Manikandan Muralidharan <manikandan.m@microchip.com>
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Manikandan Muralidharan authored
Since the SoC and board DT are already available in dts/upstream, add the difference from upstream DTS to at91-sam9x75_curiosity-u-boot.dtsi Signed-off-by:
Manikandan Muralidharan <manikandan.m@microchip.com>
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Varshini Rajendran authored
Add new Microchip sam9x7 SoC based on an ARM926. Signed-off-by:
Varshini Rajendran <varshini.rajendran@microchip.com> Signed-off-by:
Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com> Signed-off-by:
Manikandan Muralidharan <manikandan.m@microchip.com>
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Varshini Rajendran authored
Add PMC driver support for sam9x7 SoC family Signed-off-by:
Varshini Rajendran <varshini.rajendran@microchip.com> [balamanikandan.gunasundar@microchip.com: Add peripheral clock id for pmecc] Signed-off-by:
Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
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Varshini Rajendran authored
Add support for hardware dividers for PLL IDs.In sam9x7 SoC, PLL_ID_PLLA and PLL_ID_PLLA_DIV2 has /2 hardware dividers each. fcorepllack -----> HW Div = 2 -+--> fpllack | +--> HW Div = 2 ---> fplladiv2ck Signed-off-by:
Varshini Rajendran <varshini.rajendran@microchip.com>
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Varshini Rajendran authored
Add support for different core clock frequency input ranges for different PLL IDs in the PLL driver and align sam9x60, sama7g5 SOC platforms. Signed-off-by:
Varshini Rajendran <varshini.rajendran@microchip.com>
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Manikandan Muralidharan authored
Rename the include at91.h to at91-pmc-status.h to avoid conflicts with the upstream bindings that has the same file and update the relevant legacy SoC Device Trees to reflect this change. This is useful while compiling the DT and driver of the new SoC files with OF_UPSTREAM enabled. Signed-off-by:
Manikandan Muralidharan <manikandan.m@microchip.com>
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- Feb 12, 2025
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Alexander Dahl authored
From reading the S34ML02G1 and the SAM9X60 datasheets again, it seems like we have to wait tREA after rising RE# before sampling the data. Thus pulse time must be at least tREA. Without this fix we got PMECC errors when reading, after switching to ONFI timing mode 3 on SAM9X60 SoC with S34ML02G1 raw NAND flash chip. The approach to set timings used before worked on sam9g20 and sama5d2 with the same flash (S34ML02G1), probably because those have a slower mck clock rate and thus the resolution of the timings setup is not as tight as with sam9x60. The approach to fix the issue was carried over from at91bootstrap, and has been successfully tested in at91bootstrap, U-Boot and Linux. Link: https://github.com/linux4sam/at91bootstrap/issues/174 Cc: Li Bin <bin.li@microchip.com> Signed-off-by:
Alexander Dahl <ada@thorsis.com>
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Manikandan Muralidharan authored
The GPIO banks are added as sub nodes or child nodes under the pinctrl node (as per Linux ABI) and the reg property which points to an array of controllers physical base address is removed to align with the Linux devicetree. Signed-off-by:
Charan Pedumuru <charan.pedumuru@microchip.com> Signed-off-by:
Manikandan Muralidharan <manikandan.m@microchip.com>
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Manikandan Muralidharan authored
U-Boot pinctrl driver expects a reg property explicitly unlike linux. To align the DT of U-boot with the Linux, reg property is also arrvied from child GPIO bank nodes when configured under the pinctrl node. Signed-off-by:
Manikandan Muralidharan <manikandan.m@microchip.com>
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Manikandan Muralidharan authored
In Linux DT,the pinctrl node acts as parent nodes with all other gpio banks as child nodes and a single driver in Linux handles both pinctrl settings and gpio requests.Current U-Boot DT maintains both pinctrl and gpio nodes as separate nodes and offers two different class of U-Boot drivers: UCLASS_PINCTRL which handles pin functions and UCLASS_GPIO which handles gpio requests. In order to align the DT of U-Boot with the DT of Linux, a hook is been added in the pinctrl driver to bind the gpio driver with the pinctrl driver so that when adding gpio nodes as subnodes to pinctrl node (as per the Linux ABI), the corresponding APIs will be redirected and handled by valid drivers attached to the pinctrl driver. Signed-off-by:
Manikandan Muralidharan <manikandan.m@microchip.com>
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Manikandan Muralidharan authored
Add the missing properties for the pinctrl node and for its corresponding GPIO bank nodes to align with the Linux DT. Signed-off-by:
Manikandan Muralidharan <manikandan.m@microchip.com> Reviewed-by:
Eugen Hristev <eugen.hristev@linaro.org>
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Manikandan Muralidharan authored
Move pinmux nodes defined under the pinctrl node from sam9x60 SoC DT to its board specific DTS files. Signed-off-by:
Manikandan Muralidharan <manikandan.m@microchip.com> Reviewed-by:
Eugen Hristev <eugen.hristev@linaro.org>
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Balamanikandan Gunasundar authored
Define the pinctrl nodes with its label to align with the Linux DT. Without this change the pinmux nodes are grouped under an additional 'pinctrl' child node which is not identified by the pinctrl driver when the GPIO banks are made as child nodes of pinctrl node. Signed-off-by:
Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com> Signed-off-by:
Manikandan Muralidharan <manikandan.m@microchip.com> Reviewed-by:
Eugen Hristev <eugen.hristev@linaro.org>
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Manikandan Muralidharan authored
Add Advanced Interrupt Controller node and define it as interrupt parent in sam9x60 SoC DT. Signed-off-by:
Manikandan Muralidharan <manikandan.m@microchip.com> Reviewed-by:
Eugen Hristev <eugen.hristev@linaro.org>
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Alexander Dahl authored
Report spi clk speed and make use of `log_ret()`. Signed-off-by:
Alexander Dahl <ada@thorsis.com>
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Alexander Dahl authored
The qspi controller on sama5d2 and sam9x60 supports "classic" SPI mode without spi-mem enhancements and accelerations, very similar to the old SPI controller on sam9g20 or the modern flexcom controllers of the same SoC family. Register interface differs somewhat, especially because only one hardware controlled CS line is supported. Some fields are missing, some are in different registers, but in principal it works similar. So code is very much inspired by the old atmel-spi driver. Tested on sam9x60 with a non-mainline driver to configure an FPGA. Signed-off-by:
Alexander Dahl <ada@thorsis.com>
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Alexander Dahl authored
Switching between Serial Memory Mode (SMM) and (classic) SPI mode is a preparation for implementing .xfer() in the future. Signed-off-by:
Alexander Dahl <ada@thorsis.com>
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Alexander Dahl authored
The Serial Memory Mode (SMM) is enabled with atmel_qspi_set_cfg() on each invocation of atmel_qspi_exec_op(). Setting SMM through atmel_qspi_init() at probe time is redundant. Removing the SMM setting at probe time should therefore 1) be safe to do and 2) allows for setting it to a different value in a future implementation of .xfer() which needs to disable SMM. Signed-off-by:
Alexander Dahl <ada@thorsis.com>
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Alexander Dahl authored
Port these commits: - v6.11-rc5-90-g329ca3eed4a9a ("spi: atmel-quadspi: Avoid overwriting delay register settings") - v6.12-rc1-1-g162d9b5d2308c ("spi: atmel-quadspi: Fix wrong register value written to MR"). - v6.13-rc2-27-gf663898d047a7 ("spi: atmel-quadspi: Factor out switching to Serial Memory Mode to function") Cc: Csókás Bence <csokas.bence@prolan.hu> Signed-off-by:
Alexander Dahl <ada@thorsis.com>
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Alexander Dahl authored
Port changes from a 4 piece patch series from Linux kernel v5.10, merged with v5.10-rc1-83-gc732b7567d869 ("Merge series "spi: atmel-quadspi: Fix AHB memory accesses" from Tudor Ambarus …"). Port the single fix v5.15-rc1-14-g09134c5322df9 ("spi: Fixed division by zero warning"). Reduces differences between linux and u-boot driver. Cc: Tudor Ambarus <tudor.ambarus@microchip.com> Cc: Yoshitaka Ikeda <ikeda@nskint.co.jp> Signed-off-by:
Alexander Dahl <ada@thorsis.com>
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Alexander Dahl authored
Most other spi-mem drivers also depend on SPI_MEM. Fixes this build error: arm-v5te-linux-gnueabi-ld.bfd: drivers/spi/atmel-quadspi.o: in function `atmel_qspi_supports_op': /mnt/data/adahl/src/u-boot/drivers/spi/atmel-quadspi.c:460: undefined reference to `spi_mem_default_supports_op' make[1]: *** [/mnt/data/adahl/src/u-boot/Makefile:1821: u-boot] Error 1 Signed-off-by:
Alexander Dahl <ada@thorsis.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Alexander Dahl authored
This is inside of an 'if DM_SPI' block, and thus always true. Signed-off-by:
Alexander Dahl <ada@thorsis.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
Harrison Mutai <harrison.mutai@arm.com> says: This series of patches enhances the vexpress64 platform by enabling bloblist support. It also introduces support for CONFIG_BLOBLIST_PASSAGE. This is necessary to boot vexpress64 and other boards without manually specifying a fixed address and size for the bloblist. After this change, all the bloblist init modes are supported (i.e., fixed, alloc, passage) and Vexpress64 boots with CONFIG_BLOBLIST_PASSAGE. Link: https://lore.kernel.org/r/20250204175844.19890-1-harrison.mutai@arm.com
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Enable bloblist on vexpress64 platforms to facilitate information passing from TF-A using the firmware handoff framework. Signed-off-by:
Harrison Mutai <harrison.mutai@arm.com>
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When the configuration option CONFIG_BLOBLIST_PASSAGE is selected, the bloblist present in the incoming standard passage is utilised in-place. There is no need to specify the size of the bloblist as the system automatically detects it using the header information. Signed-off-by:
Harrison Mutai <harrison.mutai@arm.com>
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When booting into the Linux kernel with semi-hosting, use the device tree provided by hardware unless one is provided in the current directory. Signed-off-by:
Harrison Mutai <harrison.mutai@arm.com> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org>
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Fix the two typos in the spelling of same and set in common/Kconfig and include/bloblist.h. Signed-off-by:
Harrison Mutai <harrison.mutai@arm.com>
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- Feb 11, 2025
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- Check return value of xrealloc for NULL. - Free allocated memory and return NULL if xrealloc fails. - Prevent NULL pointer dereference in strlen and strcat. Triggers found by static analyzer Svace. Signed-off-by:
Anton Moryakov <ant.v.moryakov@gmail.com>
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- Check return value of malloc_cache_aligned for presskey and sha. - Return -ENOMEM if memory allocation fails. - Free allocated memory in error paths." Triggers found by static analyzer Svace. Signed-off-by:
Anton Moryakov <ant.v.moryakov@gmail.com>
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Dynamic memory, referenced by 'line', is allocated by calling function 'calloc' and lost when the function terminates with code -1. Signed-off-by:
Maks Mishin <maks.mishinFZ@gmail.com>
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Dynamic memory, referenced by 'line', is allocated at ublimage.c:159 by calling function 'getline' and lost at ublimage.c:184. Signed-off-by:
Maks Mishin <maks.mishinFZ@gmail.com>
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Report of the static analyzer: 1. NULL_AFTER_DEREF Pointer 'str', which is dereferenced at image-host.c:688 by calling function 'strdup', is compared to a NULL value at image-host.c:691. 2. NULL_AFTER_DEREF Pointer 'list', which is dereferenced at image-host.c:689, is compared to a NULL value at image-host.c:691. Corrections explained: 1. Checking for NULL before using pointers: The if (!list || !str) check is now performed before calling strdup and realloc, which prevents null pointer dereferences. 2. Checking the result of strdup: strdup can return NULL if memory allocation fails. This also needs to be checked. 3. Checking the result of realloc: If realloc returns NULL, then memory has not been allocated and dup must be freed to avoid memory leaks. Triggers found by static analyzer Svace. Signed-off-by:
Anton Moryakov <ant.v.moryakov@gmail.com>
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- Feb 10, 2025
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Because the beginning is already computed Signed-off-by:
Liya Huang <1425075683@qq.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@konsulko.com>
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The rules part of the template makes sure that this doesn't run until specifically requested. Drop the check in the script itself, so it is possible to trigger a run manually without re-pushing the tree. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Tom Rini authored
Judith Mendez <jm@ti.com> says: This patch series enables ESM reset configuration in board_init_f for am62x and am62px devices. This is necessary in order for error events to reset the system. This patches are tested using watchdog to reset the system via ESM. Link: https://lore.kernel.org/r/20250129234403.574766-1-jm@ti.com
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Enable CONFIG_SPL_DRIVERS_MISC, CONFIG_SPL_MISC, CONFIG_ESM_K3 to probe the Main ESM and MCU ESM nodes. Signed-off-by:
Santhosh Kumar K <s-k6@ti.com> Signed-off-by:
Judith Mendez <jm@ti.com>
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On AM62A and AM62P devices, it is possible to route Main ESM error events to MCU ESM. MCU ESM high error output can trigger the reset logic to reset the device. So, for these devices we have Main ESM and MCU ESM nodes in the device tree. Add functions to probe these nodes if CONFIG_ESM_K3 is enabled. Signed-off-by:
Santhosh Kumar K <s-k6@ti.com> Signed-off-by:
Judith Mendez <jm@ti.com>
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