- Dec 18, 2020
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Marek Szyprowski authored
For the proper reboot Odroid-C4 board requires to switch TFLASH_VDD_EN pin to the high impedance mode, otherwise the board is stuck in the middle of loading early stages of the bootloader from SD card. This can be achieved by using the OPEN_DRAIN flag instead if the ACTIVE_HIGH, what will leave the pin in input to achieve high state (pin has the pull-up) and solve the issue. Suggested-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Acked-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com>
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This patch adds bindings for the MMC slot and SPI flash on the Sipeed Maix Bit. Signed-off-by:
Sean Anderson <seanga2@gmail.com> Acked-by:
Rick Chen <rick@andestech.com> Reviewed-by:
Jagan Teki <jagan@amarulasolutions.com>
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This adds SoC-specific compatible strings to all users of the designware spi device. This will allow for the correct driver to be selected for each device. Where it is publicly documented, a compatible string for the specific device version has also been added. Devices without publicly-documented device versions include MSCC SoCs, and Arc Socs. All compatible strings except those for SoCFPGAs and some of the versioned strings have been taken from Linux. Since SSI_MAX_XFER_SIZE is determined at runtime, this is not strictly necessary. However, it is a good cleanup and brings things closer to Linux. Signed-off-by:
Sean Anderson <seanga2@gmail.com> Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by:
Jagan Teki <jagan@amarulasolutions.com>
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This property is named differently than other SPI drivers with the same property, as well as the property as used in Linux. Signed-off-by:
Sean Anderson <seanga2@gmail.com> Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by:
Jagan Teki <jagan@amarulasolutions.com>
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- Dec 16, 2020
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DM is the modern default approach for the drivers in U-Boot. It also allows to configure code via Device Tree. Move Intel Edison to use DM_USB_GADGET and drop hard coded values. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Use generic Synopsys DesignWare 3 driver on Intel Edison. For now it's just a stub which allows future refactoring. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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The platforms based on Intel Tangier may have different requirements how to create bootloader bundle to supply to a device. Currently the BINMAN approach is for Intel Edison only. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Like in the rest of x86 boards append CPU to the board compatible string. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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It appears that U-Boot works by luck on Intel Edison board because the amount of RAM is less than 1 GB and standard way of calculating the top of it work for this configuration. However, this won't work if the amount of RAM is different and split differently in address space. We have to find the suitable window correctly. Find proper memory region for relocation by scanning MMAP SFI table in board_get_usable_ram_top() callback. According to the address map documentation the Main Memory is guaranteed to lie in the 0..2 GB range, that's why we limit search by this range. Fixes: e71de54a ("x86: Add Intel Tangier support") Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed a typo in the commit message] Signed-off-by:
Bin Meng <bmeng.cn@gmail.com>
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With the updated changes to bootargs substitution[1], the zboot command needs to be updated to get its command line from an environment variable instead of a memory address. This is because the command-line string must be updated to convert %U to ${uuid}, etc. In any case it is more flexible to use a environment variable and it is best to do this before the release to avoid a subsequent change. Update the command accordingly. [1] http://patchwork.ozlabs.org/project/uboot/list/?series=212481 Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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- Dec 14, 2020
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Leo Yu-Chi Liang authored
This patch depends on Atish's patch. (https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra@wdc.com/) Add fields to complete Optional Header "Data Directories" specified in the document. (https://docs.microsoft.com/en-us/windows/win32/debug/pe-format ) Signed-off-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Cc: rick@andestech.com Cc: alankao@andestech.com Cc: atish.patra@wdc.com Cc: xypron.glpk@gmx.de Cc: bmeng.cn@gmail.com Reviewed-by:
Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by:
Atish Patra <atish.patra@wdc.com>
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Leo Yu-Chi Liang authored
This patch depends on Atish's patch. (https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra@wdc.com/) Modify the size of the Optional Header "Windows-Specific Fields" to fit with the specification. (https://docs.microsoft.com/en-us/windows/win32/debug/pe-format ) Signed-off-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Cc: rick@andestech.com Cc: alankao@andestech.com Cc: atish.patra@wdc.com Cc: xypron.glpk@gmx.de Cc: bmeng.cn@gmail.com
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Atish Patra authored
RV32 should use PE32 format instead of PE32+ as the efi header format. This requires following changes 1. A different header magic value 2. An additional parameter known as BaseOfData. Currently, it is set to zero in absence of any usage. Signed-off-by:
Atish Patra <atish.patra@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Heinrich Schuchardt authored
If an exception occurs on ARM or x86, we call panic() which will try to reset the board. Do the same on RISC-V. To avoid -Werror=format-zero-length move a '\n' to the string passed to panic. We don't need a message here as depending on CONFIG_PANIC_HANG we will either see ### ERROR ### Please RESET the board ### or resetting ... as next message. Reviewed-by:
Rick Chen <rick@andestech.com> Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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Brad Kim authored
Not s2 register, t1 register is correct Fortunately, it works because t1 register has a garbage value Signed-off-by:
Brad Kim <brad.kim@semifive.com> Reviewed-by:
Lukas Auer <lukas@auer.io> Reviewed-by:
Leo Liang <ycliang@andestech.com>
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- Dec 11, 2020
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Eugen Hristev authored
The correct compatible for this eeproms is microchip,24aa02e48 The previous compatible string was working up to U-boot 2020.04. Signed-off-by:
Eugen Hristev <eugen.hristev@microchip.com> Tested-by:
Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
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- Dec 10, 2020
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The USB support is not by default enabled on all designs, so it does not make seance to have USB specific erratum's enabled on such a designs. On our internal Hitachi-Powergrids design not using the USB controller there is a crash when accessing those specific memory locations selected by the erratum flags. Signed-off-by:
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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If the board isn't strapped to enable USB1 then attempting to access it will result in a hang. Avoid this by allowing boards to define CONFIG_USB_MAX_CONTROLLER_COUNT. Signed-off-by:
Chris Packham <judge.packham@gmail.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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When booting from TF-A there is a logic that attempt to detect if the default environment is used, if this is the case it then set the `bootcmd` and `mcinitcmd` depending of the device we booted from. This detection logic is dubious as it access internals of the env implementation and it doesn't always work correctly. First of all it detect any valid environment as not being the default, so after running `env default -a && saveenv` the board doesn't boot anymore as `bootcmd` is then empty. But it also fails in some other ways, for example it always detect a default environment when redundant env is enabled on MMC, so in that case `bootcmd` is overwritten on every boot. Instead of increasing the complexity of the detection just check if `bootcmd` and `mcinitcmd` are set in the environment and set them if they are not. Signed-off-by:
Alban Bedel <alban.bedel@aerq.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Check for NULL return value from fdt_getprop() in fdt_fixup_remove_jr() Signed-off-by:
Priyanka Singh <priyanka.singh@nxp.com> [Fixed checkpatch errors/warnings] Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com>
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This patch add base support for LX2162AQDS board. LX2162AQDS board supports LX2162A family SoCs. This patch add basic support of platform. Signed-off-by:
Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by:
Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by:
hui.song <hui.song_1@nxp.com> Signed-off-by:
Manish Tomar <manish.tomar@nxp.com> Signed-off-by:
Vikas Singh <vikas.singh@nxp.com> Signed-off-by:
Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> [Rebased] Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com>
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LX2162 is LX2160 based SoC, it has same die as of LX2160 with different packaging. LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module, microSD card, eMMC support, serial console, qspi nor flash, qsgmii, sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes interface to support three PCIe gen3 interface. Signed-off-by:
Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> [Fixed whitespace errors] Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
Wasim Khan <wasim.khan@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
Wasim Khan <wasim.khan@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
Wasim Khan <wasim.khan@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
Wasim Khan <wasim.khan@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
Wasim Khan <wasim.khan@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
Wasim Khan <wasim.khan@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
Wasim Khan <wasim.khan@nxp.com> [Rebased] Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- Dec 09, 2020
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Add USB OTG ID pin mux and switch the USB OTG port from peripheral to OTG mode. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by:
Patrick Delaunay <patrick.delaunay@foss.st.com>
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The DH DRC02 board has an on-board microSD slot, add DT properties to enable the slot. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by:
Patrick Delaunay <patrick.delaunay@foss.st.com>
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The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter or without one on the SDMMC1 interface. Because the SDMMC1 interface is limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback clock to permit operation of the same U-Boot image on both SoM with and without voltage level shifter. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by:
Patrick Delaunay <patrick.delaunay@foss.st.com>
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The default state of SD bus and clock line is logical HI. SD card IO is open-drain and pulls the bus lines LO. Always enable the SD bus pull ups to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus voltage level shifter, the pull ups are built into the level shifter, however that has no negative impact. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by:
Patrick Delaunay <patrick.delaunay@foss.st.com>
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Update Patrick and my email address with the one dedicated to upstream activities. Signed-off-by:
Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by:
Patrick Delaunay <patrick.delaunay@st.com>
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- Dec 07, 2020
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To simplify setup, configuration and compilation of u-boot, define emmc node for all Espressobin boards. Espressobin boards without populated emmc works correctly, just detection and initialization of emmc obviously fails. Code for emmc is extracted from commit f1a43c84 ("arm64: dts: a3720: add support for espressobin with populated emmc"). Signed-off-by:
Pali Rohár <pali@kernel.org> Tested-by:
Gérald Kerma <gerald@gk2.net>
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This reverts commit f1a43c84.
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This reverts commit 03bb6a9b.
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Hardware testing of a board using the Armada 385 has shown that an impedance threshold setting of 0x7 performs better in an eye-diagram test than with Marvell's recommended value 0x6. As other boards may still perform better with Marvell's reccomended value, a configuration option is added with a default value of 0x6. Signed-off-by:
Joshua Scott <joshua.scott@alliedtelesis.co.nz> Reviewed-by:
Stefan Roese <sr@denx.de>
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- Dec 06, 2020
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Introduce weak function board_mem_get_layout() which allows overriding the memory layout from board code in runtime, useful for handling different SKU versions. Signed-off-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by:
Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by:
Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
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This commit adds initial support for the Toradex Apalis iMX8X 2GB WB IT V1.1A System on Module support [1]. Boot log: U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300) CPU: NXP i.MX8QXP RevB A35 at 1200 MHz at 30C DRAM: 2 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... OK In: serial@5a070000 Out: serial@5a070000 Err: serial@5a070000 Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A, Serial# 06617018 Net: eth0: ethernet@5b040000 [PRIME] Hit any key to stop autoboot: 0 Functionality wise the following is known to be working: - eMMC and MMC/SD card - Ethernet (*) - GPIOs - I2C Unfortunately, there is no USB functionality for the i.MX 8QXP as of yet. * With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1) ETH PHY encounters bring up problems after reset, this will be fixed soon on SCU FW side. [1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x Signed-off-by:
Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by:
Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
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