- Sep 13, 2022
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Michal Simek authored
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME stores the name of firmware file to be loaded by SPL. Name can be selected via Kconfig that's why use the macro. Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/601fbc2dfd16b4708fc6b5f86954e10add43334e.1660055571.git.michal.simek@amd.com
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Michal Simek authored
Generate dfu_alt_info only when it is not defined. Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/464e4b325c644e52a660df9cf44eeb4d80427f6a.1660055571.git.michal.simek@amd.com
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Michal Simek authored
Zynq can use efi capsule infrastructure that's why enable it by default. For capsule generation for zynq you can use: pushd spl ../tools/mkeficapsule -g "1ba29a15-9969-40aa-b424-e86121618664" boot.bin \ --index 1 ../capsule1.bin popd ./tools/mkeficapsule -g "1a5178f0-87d3-4f36-ac63-3b31a23be305" u-boot.img \ --index 2 capsule2.bin Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a8194ecfa7932f2d8ada5ee508b2a026c782f15e.1660055571.git.michal.simek@amd.com
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Ashok Reddy Soma authored
With commit 55b3ba4c ("spi: cadence_qspi: Migrate CONFIG_CQSPI_REF_CLK to Kconfig") CONFIG_CQSPI_REF_CLK is moved to Kconfig. The static value via Kconfig is a fallback option in case of clock framework is not enabled or fails for some reason. Signed-off-by:
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fe7c38a19e878c307d5b75311bbfd8cf6c1f601e.1659691195.git.michal.simek@amd.com
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Ashok Reddy Soma authored
Enable power domain driver to request node for all the IP's that are enabled in DT. Signed-off-by:
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/dbed54df622d647b8d520d8ce5289cd69ba66e0b.1659691195.git.michal.simek@amd.com
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Ashok Reddy Soma authored
SET_CONFIGURATION is not yet implemented for Versal platforms. Skip loading config object for Versal until support is added. Signed-off-by:
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/eb7ef6c6de36a1f7d056de43042f96fe3639f18e.1659691195.git.michal.simek@amd.com
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- Sep 12, 2022
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Michal Simek authored
There shouldn't be a reason to have LMB on for these configurations. LMB was already disabled for ZynqMP by commit 0063487a5b60 ("configs: zynqmp: Disable LMB for mini u-boot"). Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/07d95f619a15672d1a234eddcfbb54c0ab382eaa.1662460867.git.michal.simek@amd.com
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Ashok Reddy Soma authored
LMB is not required for mini u-boot which runs out of on chip memory. Disable CONFIG_LMB from mini u-boot defconfig's. Signed-off-by:
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/45fad28825f0f236ad45e700aca1f39afbb22236.1659691195.git.michal.simek@amd.com
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Michal Simek authored
The commit 9996cea7 ("lmb/bdinfo: dump lmb info via bdinfo") added support for dumping LMB information as the part of bdinfo. But code itself should be called only when LMB is enabled. Signed-off-by:
Michal Simek <michal.simek@amd.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/3e40c8bb77550dfca9f7eb48fe644a018d971411.1662537127.git.michal.simek@amd.com
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Ashok Reddy Soma authored
With 2022.01-rc3 upgrade, the size of the mini U-Boot increased and is not able to fit in OCM. Hence disable unnecessary configs and make room. Signed-off-by:
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/306b57818601fa3571bc75c4182f25aaa3f2a793.1659691195.git.michal.simek@amd.com
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Michal Simek authored
Xilinx is using pca954x i2c muxes on a lot of boards that's why enable this driver by default. Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c090aea3436c7a4ebe698da6cbc70e70a14baae3.1659691195.git.michal.simek@amd.com
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Janne Ylalehto authored
The user provided key address was not flushed in struct aes because of the flushing location in the function. Signed-off-by:
Janne Ylalehto <ylalehto@gmail.com> Link: https://lore.kernel.org/r/20220816124525.19671-1-ylalehto@gmail.com Signed-off-by:
Michal Simek <michal.simek@amd.com>
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Stefan Herbrechtsmeier authored
The drivers informs the user that a post config was not run after FPGA configuration. This message is unnecessary in SPL because the ps7_post_config function is called via spl_board_prepare_for_boot function before jump_to_image_no_args function from board_init_r function. Signed-off-by:
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220808145331.24723-1-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by:
Michal Simek <michal.simek@amd.com>
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Stefan Herbrechtsmeier authored
Move arm twd timer driver from zynq to generic location. DM timer drivers are designed differently to original driver. Timer is counting up and not down. Information about clock rates are find out in timer_pre_probe() that's why there is no need to get any additional information from DT in the driver itself (only register offset). Signed-off-by:
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220805061629.1207-1-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by:
Michal Simek <michal.simek@amd.com>
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- Sep 03, 2022
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Tom Rini authored
- DM RTC improvements that should help in CI, allow disabling LTO from the make line, add extension (cape, etc) support to distro bootcmd, add a pause command and re-enable ARM v4T support.
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- Sep 02, 2022
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At present the sandbox timer uses localtime() which can jump around twice a year when daylight-saving time changes. It would be tricky to make use of gmtime() since we still need to present the time in local time, as seems to be required by U-Boot's RTC interface. The problem can only happen once, so use a loop to detect it and try again. This should be sufficient to detect either a change in the 'second' value, or a daylight-saving change. We can assume that the latter also incorporates a 'second' change, so there is no need to loop more than twice. Signed-off-by:
Simon Glass <sjg@chromium.org>
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It seems that the time can change in between getting it and reading the offset. Check for this and try again if this happens. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Since resetting the RTC on sandbox causes it to read the base time from the system, we cannot rely on this being unchanged since it was last read. Allow for a one-second delay. Reviewed-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Fixes: u-boot/u-boot#4 Reported-by:
Bin Meng <bmeng.cn@gmail.com> Reported-by:
Tom Rini <trini@konsulko.com> Suggested-by:
Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by:
Simon Glass <sjg@chromium.org>
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Some tests can have race conditions which are hard to detect on a single one. Add a way to run tests more than once, to help with this. Each individual test is run the requested number of times before moving to the next test. If any runs failed, a message is shown. This is most useful when running a single test, since running all tests multiple times can take a while. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Use this (newish) macro since it is designed for the purpose of making sure things are non-NULL. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Check that sandbox builds and runs tests OK with LTO disabled. Signed-off-by:
Simon Glass <sjg@chromium.org>
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LTO (Link-Time Optimisation) is an very useful feature which can significantly reduce the size of U-Boot binaries. So far it has been made available for selected ARM boards and sandbox. However, incremental builds are much slower when LTO is used. For example, an incremental build of sandbox takes 2.1 seconds on my machine, but 6.7 seconds with LTO enabled. Add a NO_LTO parameter to the build, similar to NO_SDL, so it can be disabled during development if needed, for faster builds. Add some documentation about LTO while we are here. Signed-off-by:
Simon Glass <sjg@chromium.org>
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There is currently a problem that U-Boot can not work on ARMv4 because assembly imlementations of memcpy() and some other functions use "bx lr" instruction that is not available on ARMv4 ("mov pc, lr" should be used instead). A working preprocessor-based solution to this problem is found in arch/arm/lib/relocate.S. Move it to the "ret" macro in arch/arm/include/asm/assembler.h and change all "bx lr" code to "ret lr" in functions that may run on ARMv4. Linux source code deals with this problem in the same manner. v1 -> v2: Comment update. Pointed out by Andre Przywara. Signed-off-by:
Sergei Antonov <saproj@gmail.com> CC: Samuel Holland <samuel@sholland.org> CC: Ye Li <ye.li@nxp.com> CC: Simon Glass <sjg@chromium.org> CC: Andre Przywara <andre.przywara@arm.com> CC: Marek Vasut <marex@denx.de> CC: Sean Anderson <sean.anderson@seco.com> CC: Tom Rini <trini@konsulko.com>
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This command is being introduced with the goal of allowing user-friendly "generic use case" U-Boot builds to pause until user input under some situations. The main use case would be when a boot failure happens, to pause until the user has had time to acknowledge the current state. Tested using: make && ./u-boot -v -T -c 'ut lib lib_test_hush_pause' Signed-off-by:
Samuel Dionne-Riel <samuel@dionne-riel.com> Cc: Simon Glass <sjg@chromium.org>
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Try to load required DTB overlays if the board supports extensions and CONFIG_CMD_EXTENSION is enabled. Signed-off-by:
Matwey V. Kornilov <matwey.kornilov@gmail.com>
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Tom Rini authored
- Assorted Kconfig migrations
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- Sep 01, 2022
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Enable d-cache early in SPL right after DRAM is started up. This reduces U-Boot proper load time by 650ms when loaded from SPI NOR. Signed-off-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Philip Oberfichtner <pro@denx.de>
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Introduce the new Kconfig symbol CONFIG_SPL_SYS_L2_PL310 to allow the SPL to build cache-pl310.c. Before this commit, the SPL could enable the PL310 L2 cache [1], but the cache maintenance functions from cache-pl310.c were only useable for non-SPL builds. After enabling the cache one must be able to flush it, too. Thus this commit allows cache-pl310.c to be included in the SPL build. [1] See for example arch/arm/mach-imx/cache.c: v7_outer_cache_enable() Signed-off-by:
Philip Oberfichtner <pro@denx.de>
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This converts CONFIG_SYS_L2_PL310 to Kconfig. For omap2 and mvebu the 'select SYS_L2_PL310' locations were determined using ./tools/moveconfig -i CONFIG_SYS_L2_PL310. For mx6 I manually chose ARCH_MX6 as 'select' location. The correctness has been verified using $ ./tools/moveconfig.py -f ARCH_MX6 ~SYS_L2_PL310 ~SYS_L2CACHE_OFF 0 matches That means whenever an ARCH_MX6 board had SYS_L2_PL310 disabled, this was correctly reflected in SYS_L2CACHE_OFF. Thus it's safe to insert the 'select' statement under ARCH_MX6. Signed-off-by:
Philip Oberfichtner <pro@denx.de>
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Tom Rini authored
This removes the following symbols: CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS CONFIG_SYS_I2C_LDI_ADDR CONFIG_SYS_I2C_DVI_ADDR CONFIG_SYS_I2C_DVI_BUS_NUM They are unused by any code in tree at this time. Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This converts the following to Kconfig: CONFIG_SYS_I2C_EEPROM_CCID CONFIG_SYS_I2C_EEPROM_NXID CONFIG_SYS_EEPROM_BUS_NUM Signed-off-by:
Tom Rini <trini@konsulko.com>
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- Aug 26, 2022
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Tom Rini authored
- Assorted Arm, TI and Qualcomm platform updates
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We can check if the message was acknowledged in the common ti_sci_do_xfer() which lets us remove it from after each call to this function. This simplifies the code and reduces binary size. Signed-off-by:
Andrew Davis <afd@ti.com>
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The inline hint is not needed here, the compiler will do the right thing based on if we are compiling for speed or for code size. In this case the inline causes this function to be placed inside each callsite which is not the right thing to do for either speed nor size. There is no performance benefit to this due to the larger function size reducing cache locality, but there is a huge size penalty. Remove inline keyword. Signed-off-by:
Andrew Davis <afd@ti.com>
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We don't need to print the same message in every location, just print it in the function that fails and remove all the extra message printouts. Signed-off-by:
Andrew Davis <afd@ti.com>
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This ti_sci_do_xfer() function already prints out the reason for the failure, and the caller of each of these functions should also notify the user of the failed task. Remove this extra level of error message. Signed-off-by:
Andrew Davis <afd@ti.com>
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Currently for all Qcom SoCs/boards there are separate compatibles for GPIO and pinctrl. But this is inconsistent with official (upstream) Linux bindings which requires only a single compatible "qcom,<SoC name>-pinctrl" and there is no such compatible property as "qcom,tlmm-<SoC name>". So fix this inconsistency for Qcom SoCs in order to comply with upstream DT bindings. This is done via removing compatibles from "msm_gpio" driver and via binding to "msm_gpio" driver from pinctrl driver in case "gpio-controller" property is specified for pinctrl node. Suggested-by:
Stephan Gerhold <stephan@gerhold.net> Signed-off-by:
Sumit Garg <sumit.garg@linaro.org>
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DT compatible is sufficient to make platform specific differentiation, so remove redundant CONFIG_SDM845 check. Signed-off-by:
Sumit Garg <sumit.garg@linaro.org> Reviewed-by:
Ramon Fried <rfried.dev@gmail.com>
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Enable USB config options along with its dependencies like PHY, RESET, PMIC GPIO etc. config options. Signed-off-by:
Sumit Garg <sumit.garg@linaro.org>
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For USB3 host controller to detect devices on the bus it is required to enable a PMIC GPIO: usb_vbus_boost_pin. So enable that during board specific initialization. And since this PMIC GPIO parsing is quite u-boot specific, so add a DT override to qcs404-evb-uboot.dtsi to represent usb_vbus_boost_pin. Signed-off-by:
Sumit Garg <sumit.garg@linaro.org>
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