- Nov 09, 2021
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To make the synchronization of the u-boot device tree with the one from linux easier, move the I/O window to the one which is specified in the linux device tree. The actual value shouldn't matter as long as it mapped to the corresponding memory window of the PCIe controller which is a 32GiB window at 80_0000_0000h (first controller) or 88_0000_0000h (second controller). Signed-off-by:
Michael Walle <michael@walle.cc> Reviewed-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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This property is unused in the layerscape PCIe controller driver and not present in the linux device tree. Remove it to be similarly. Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by:
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The official bindind of the PCIe controller of the ls1028a has the following compatible string: compatible = "fsl,ls1028a-pcie"; Additionally, the resource names and count are different. Update the driver to support this binding and change the entry in the ls1028a device tree. Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by:
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The official ls1028a binding of the driver uses the following as compatibles: compatible = "fsl,ls1028a-dwc3", "snps,dwc3"; Change the ls1028a device tree and add this new compatible to the fsl specific xhci driver, otherwise the generic dwc3 driver will be used with the compatibles above. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Signed-off-by:
Bin Meng <bmeng.cn@gmail.com>
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The driver will look for a named resource "ecc-addr", but this isn't the official binding. In fact, the official device tree binding documentation doesn't mention any resource names at all. But it is safe to assume that it's the linux ones we have to use if we want to be compatible with the linux device tree. Thus rename "ecc-addr" to "sata-ecc" and convert all the users in u-boot. While at it, also rename "sata-base" to "ahci" although its not used at all. This change doesn't affect the SATA controller on the ZynqMP. Cc: Michal Simek <monstr@monstr.eu> Signed-off-by:
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The official ls1028a binding of the driver uses the following as compatibles: compatible = "fsl,ls1028a-lpuart"; Add the missing compatible to the driver and update the device tree. Signed-off-by:
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The official devicetree bindings specifies spi-num-chipselects as the name. Use it. Signed-off-by:
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The official ls1028a binding of the driver uses the following as compatibles: compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi"; Add the missing compatible to the driver and update the device tree. We can use the fallback "fsl,ls1021a-v1.0-dspi", because the endianness is determined by the little-endian property and not by the compatible string itself. Further, we won't need and specific details on the DMA configuration (which is different on the LS1021A). If it's ever needed, we can later add the more specific "fsl,ls1028a-dspi" compatible to the driver. Signed-off-by:
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According to the linux device tree specification the compatible string is: compatible = "arm,sp805", "arm,primecell"; Fix all users in u-boot. Signed-off-by:
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Update the labels of the nodes to match the kernel ones. Signed-off-by:
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While inserting them into the new location, keep them sorted by the register base offset just like in the linux kernel device tree. While at it fix the indentation. Signed-off-by:
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While inserting it into the new location, keep it sorted by the register base offset just like in the linux kernel device tree. Signed-off-by:
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While inserting them into the new location, keep them sorted by the register base offset just like in the linux kernel device tree. While at it fix the indentation. Signed-off-by:
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While inserting them into the new location, keep them sorted by the register base offset just like in the linux kernel device tree. Signed-off-by:
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While inserting them into the new location, keep them sorted by the register base offset just like in the linux kernel device tree. Signed-off-by:
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While inserting them into the new location, keep them sorted by the register base offset just like in the linux kernel device tree. Signed-off-by:
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While inserting them into the new location, keep them sorted by the register base offset just like in the linux kernel device tree. Signed-off-by:
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While inserting them into the new location, keep them sorted by the register base offset just like in the linux kernel device tree. Signed-off-by:
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While inserting it into the new location, keep it sorted by the register base offset just like in the linux kernel device tree. Signed-off-by:
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While inserting them into the new location, keep them sorted by the register base offset just like in the linux kernel device tree. Signed-off-by:
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Populate the /soc node with the first device node. Signed-off-by:
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To keep the device tree similar to the linux kernel one, we need to move all CCSR related devices into the /soc node. To keep the patches easy to review, we initially add an empty /soc node and populate it piece by piece. Signed-off-by:
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Nowadays, both boards boot using the TF-A BL1/BL2 and SPL isn't used at all. The property is not needed, remove it. Signed-off-by:
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This node is some hodgepodge between the ddr controller node at SoC offset 0x1080000 and some static memory size of 2GiB. Remove this bogus node because it doesn't seem to be used at all. Signed-off-by:
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There is no "fsl,ls1028a-gpu" compatible string. It is solely for the proprietary driver which will never be open source. Lately, linux gained support for the open source etnaviv driver for the GPU (although there is still support for the DisplayPort PHY missing to get actual graphics output). Thus, instead of supporting some proprietary driver, switch over to the open source one, which also have an official device tree binding. Cc: Andy Tang <andy.tang@nxp.com> Signed-off-by:
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Remove "num-cs" property from device-tree as it is no longer used by qspi driver anymore. Also, specify status as "disabled" and enable qspi support in respective board dts files. This will also help in aligning node properties with other board properties. Signed-off-by:
Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by:
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Generate a FIT update image during build. The image will be called "u-boot.update" and can be used to build an EFI UpdateCapsule or during DFU mode. Although, the latter isn't supported because there is no USB OTG driver yet. Signed-off-by:
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Disabling PCIE support currently lead to a crash because the code for erratum A010315 is still run. Add a conditional to only select CONFIG_SYS_FSL_ERRATUM_A010315 when CONFIG_PCIE_LAYERSCAPE is enabled. Signed-off-by:
Alban Bedel <alban.bedel@aerq.com> Reviewed-by:
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- Nov 05, 2021
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Tom Rini authored
This converts the following to Kconfig: CONFIG_SYS_HZ Signed-off-by:Tom Rini <trini@konsulko.com>
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Tom Rini authored
When building a system that has both TPL and SPL_OS_BOOT, code which tests for CONFIG_SPL_OS_BOOT will be built and enabled in TPL, which is not correct. While there is no CONFIG_TPL_OS_BOOT symbol at this time (and likely will not ever be) we can use CONFIG_IS_ENABLED(OS_BOOT) in these common paths to ensure we only compile these parts in the SPL case. Signed-off-by:
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- Nov 04, 2021
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Instead of hardcoding the watchdog for reset, and the PMIC for poweroff, use the sysreset framework to manage the available poweroff/reset backends. This allows (as examples) using the PMIC to do a cold reset, and using a GPIO to power off H3/H5 boards lacking a PMIC. Furthermore, it removes the need to hardcode watchdog MMIO addresses, since the sysreset backends can be discovered using the device tree. Reviewed-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Stefan Roese <sr@denx.de>
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The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by:
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- Oct 31, 2021
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Samsung Galaxy A3, A5, A7 (2017) - middle class Samsung smartphones. U-boot can be used as chain-loaded bootloader to gain control on booting vanilla linux(and possibly others) kernels Signed-off-by:Dzmitry Sankouski <dsankouski@gmail.com> Cc: Minkyu Kang <mk7.kang@samsung.com>
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Samsung Exynos 7880 \ 7870 - SoC for mainstream smartphones and tablets introduced on March 2017. Features: - 8 Cortex A53 cores - ARM Mali-T830 MP3 GPU - LTE Cat. 7 (7880) or 6 (7870) modem Signed-off-by: -
Samsung S9 SM-G9600 - Snapdragon SDM845 version of the phone, for China \ Hong Kong markets. Has unlockable bootloader, unlike SM-G960U (American market version), which allows running u-boot as a chain-loaded bootloader. Signed-off-by: -
Hi-end qualcomm chip, introduced in late 2017. Mostly used in flagship phones and tablets of 2018. Features: - arm64 arch - total of 8 Kryo 385 Gold / Silver cores - Hexagon 685 DSP - Adreno 630 GPU Tested only as second-stage bootloader. Signed-off-by: -
Allows to change clock frequency of debug uart, thus supporting wide range of baudrates. Enable / disable functionality is not implemented yet. In most use cases of SDM845 (i.e. mobile phones and tablets) it's not needed, because qualcomm first stage bootloader leaves it initialized, and on the other hand there's no possibility to replace signed first stage bootloader with u-boot. Signed-off-by: -
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Add preliminary device trees for the Apple M1 mini (2020) and Apple M1 Macbook Pro 13" (2020). Device tree bindings for the Apple M1 SoC are still being formalized and these device trees will be synchronized with the Linux kernel as needed. The device trees in this commit are based on the initial Apple M1 device trees from Linux 5.13, nodes for dart, pcie, pinctrl, pmgr, usb based on bindings on track for inclusion in Linux 5.15 and 5.16 and nodes for i2c, mailbox, nvme, pmu, spmi and watchdog that don't have a proposed binding yet. These device trees are provided as a reference only as U-Boot uses the device tree passed by the m1n1 bootloader. Signed-off-by:
Mark Kettenis <kettenis@openbsd.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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The DART is an IOMMU that is used on Apple's M1 SoC. This driver configures the DART such that it operates in bypass mode which is enough to support DMA for the USB3 ports integrated on the SoC. Signed-off-by:
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