- Sep 13, 2022
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Michal Simek authored
On QEMU setting rate for fixed clock is failing. That's why check a rate first if the rate is the same there is no need to ask for the change. Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/bc465ffd4904bfd65208b782daa06732b915db54.1661502645.git.michal.simek@amd.com
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Michal Simek authored
There shouldn't be a reason to have LMB on for these configurations. LMB was already disabled for ZynqMP by commit 0063487a5b60 ("configs: zynqmp: Disable LMB for mini u-boot"). Signed-off-by: -
Michal Simek authored
The commit ce39ee28 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by:
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Michal Simek authored
The main reason is that DT memory reserved code is expecting DT to be 64bit aligned. For more information take a look at commit 5bd5ee02 ("xilinx: zynqmp: Check that DT is 64bit aligned"). Signed-off-by:
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Michal Simek authored
Enable both of these commands in Xilinx SoCs to be able to use them in boot scripts. Signed-off-by:
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T Karthik Reddy authored
ENV_OFFSET_REDUND config is by default set to 0 for flashes. Saving the env variables is overwriting data at 0 offset, which is wrong. So add default redund env offset for Zynq, ZynqMP, Versal and microblaze platforms. Configured ENV_OFFSET_REDUND offsets by ENV_OFFSET + (2 * ENV_SIZE). In case of versal, we configured ENV_OFFSET_REDUND at 0x7F00000 instead of 0x7F80000. As BOOT_SCRIPT_OFFSET is already configured at 0x7F80000. Added ENV_OFFSET_REDUND in Kconfig for microblaze due to dependency of ENV_IS_IN_SPI_FLASH config. Below table specifies platform specific env and env redund offsets. PLAT ENV_OFFSET ENV_OFFSET_REDUND ---- ---------- ----------------- ZYNQ 0xE0000 0xE40000 ZYNQMP 0x1E00000 0x1E80000 VERSAL 0x7F40000 0x7F00000 MICROBLAZE 0x1080000 0x10C0000 Signed-off-by:
T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by:
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Piyush Mehta authored
Added ref_clk 'ref' property for GUCTL_REFCLKPER and GFLADJ_REFCLK_FLADJ calculation. This property configure correct value for SOF/ITP counter and period of ref_clk. This patch adds 'ref' property for both dwc3_0 and dwc3_1 cores. Signed-off-by:
Piyush Mehta <piyush.mehta@amd.com> Signed-off-by:
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Michal Simek authored
Add missing tca6416 i2c gpio controller to SC dts file. Signed-off-by:
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Harini Katakam authored
cdns,zynq/zynqmp were recentle deprecated in Linux in favour of xlnx prefix. Add this new compatible string and retain the existing string for compatibility with uboot drivers. Signed-off-by:
Harini Katakam <harini.katakam@amd.com> Signed-off-by:
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Amit Kumar Mahapatra authored
Update MTD partitions of Kria device trees to allocate 128KB of QSPI memory for secure OS. Increased "SHA256" partition size & changed starting address of "User" partition to accommodate the new partition "Secure OS Storage" Signed-off-by:
Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by:
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Michal Simek authored
The commit 53b40636 ("DFU: Check the number of arguments and argument string strictly") added strict control over string that 0:1 partition definition is not valid anymore that's why use only device number without partition ID. Device is specified by 2nd parameter and partition by 3rd. Signed-off-by:
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Michal Simek authored
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME stores the name of firmware file to be loaded by SPL. Name can be selected via Kconfig that's why use the macro. Signed-off-by:
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Michal Simek authored
Generate dfu_alt_info only when it is not defined. Signed-off-by:
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Michal Simek authored
Zynq can use efi capsule infrastructure that's why enable it by default. For capsule generation for zynq you can use: pushd spl ../tools/mkeficapsule -g "1ba29a15-9969-40aa-b424-e86121618664" boot.bin \ --index 1 ../capsule1.bin popd ./tools/mkeficapsule -g "1a5178f0-87d3-4f36-ac63-3b31a23be305" u-boot.img \ --index 2 capsule2.bin Signed-off-by:
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Ashok Reddy Soma authored
With commit 55b3ba4c ("spi: cadence_qspi: Migrate CONFIG_CQSPI_REF_CLK to Kconfig") CONFIG_CQSPI_REF_CLK is moved to Kconfig. The static value via Kconfig is a fallback option in case of clock framework is not enabled or fails for some reason. Signed-off-by:
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by:
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Ashok Reddy Soma authored
Enable power domain driver to request node for all the IP's that are enabled in DT. Signed-off-by:
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Ashok Reddy Soma authored
SET_CONFIGURATION is not yet implemented for Versal platforms. Skip loading config object for Versal until support is added. Signed-off-by:
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- Sep 12, 2022
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Michal Simek authored
There shouldn't be a reason to have LMB on for these configurations. LMB was already disabled for ZynqMP by commit 0063487a5b60 ("configs: zynqmp: Disable LMB for mini u-boot"). Signed-off-by: -
Ashok Reddy Soma authored
LMB is not required for mini u-boot which runs out of on chip memory. Disable CONFIG_LMB from mini u-boot defconfig's. Signed-off-by:
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Michal Simek authored
The commit 9996cea7 ("lmb/bdinfo: dump lmb info via bdinfo") added support for dumping LMB information as the part of bdinfo. But code itself should be called only when LMB is enabled. Signed-off-by:
Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/3e40c8bb77550dfca9f7eb48fe644a018d971411.1662537127.git.michal.simek@amd.com
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Ashok Reddy Soma authored
With 2022.01-rc3 upgrade, the size of the mini U-Boot increased and is not able to fit in OCM. Hence disable unnecessary configs and make room. Signed-off-by:
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Michal Simek authored
Xilinx is using pca954x i2c muxes on a lot of boards that's why enable this driver by default. Signed-off-by:
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Janne Ylalehto authored
The user provided key address was not flushed in struct aes because of the flushing location in the function. Signed-off-by:
Janne Ylalehto <ylalehto@gmail.com> Link: https://lore.kernel.org/r/20220816124525.19671-1-ylalehto@gmail.com Signed-off-by:
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Stefan Herbrechtsmeier authored
The drivers informs the user that a post config was not run after FPGA configuration. This message is unnecessary in SPL because the ps7_post_config function is called via spl_board_prepare_for_boot function before jump_to_image_no_args function from board_init_r function. Signed-off-by:
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220808145331.24723-1-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by:
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Stefan Herbrechtsmeier authored
Move arm twd timer driver from zynq to generic location. DM timer drivers are designed differently to original driver. Timer is counting up and not down. Information about clock rates are find out in timer_pre_probe() that's why there is no need to get any additional information from DT in the driver itself (only register offset). Signed-off-by:
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- Sep 03, 2022
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Tom Rini authored
- DM RTC improvements that should help in CI, allow disabling LTO from the make line, add extension (cape, etc) support to distro bootcmd, add a pause command and re-enable ARM v4T support.
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- Sep 02, 2022
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At present the sandbox timer uses localtime() which can jump around twice a year when daylight-saving time changes. It would be tricky to make use of gmtime() since we still need to present the time in local time, as seems to be required by U-Boot's RTC interface. The problem can only happen once, so use a loop to detect it and try again. This should be sufficient to detect either a change in the 'second' value, or a daylight-saving change. We can assume that the latter also incorporates a 'second' change, so there is no need to loop more than twice. Signed-off-by: -
It seems that the time can change in between getting it and reading the offset. Check for this and try again if this happens. Signed-off-by: -
Since resetting the RTC on sandbox causes it to read the base time from the system, we cannot rely on this being unchanged since it was last read. Allow for a one-second delay. Reviewed-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Fixes: u-boot/u-boot#4 Reported-by:
Bin Meng <bmeng.cn@gmail.com>
Reported-by: Tom Rini <trini@konsulko.com> Suggested-by:
Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by:
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Some tests can have race conditions which are hard to detect on a single one. Add a way to run tests more than once, to help with this. Each individual test is run the requested number of times before moving to the next test. If any runs failed, a message is shown. This is most useful when running a single test, since running all tests multiple times can take a while. Signed-off-by: -
Use this (newish) macro since it is designed for the purpose of making sure things are non-NULL. Signed-off-by: -
Check that sandbox builds and runs tests OK with LTO disabled. Signed-off-by: -
LTO (Link-Time Optimisation) is an very useful feature which can significantly reduce the size of U-Boot binaries. So far it has been made available for selected ARM boards and sandbox. However, incremental builds are much slower when LTO is used. For example, an incremental build of sandbox takes 2.1 seconds on my machine, but 6.7 seconds with LTO enabled. Add a NO_LTO parameter to the build, similar to NO_SDL, so it can be disabled during development if needed, for faster builds. Add some documentation about LTO while we are here. Signed-off-by: -
There is currently a problem that U-Boot can not work on ARMv4 because assembly imlementations of memcpy() and some other functions use "bx lr" instruction that is not available on ARMv4 ("mov pc, lr" should be used instead). A working preprocessor-based solution to this problem is found in arch/arm/lib/relocate.S. Move it to the "ret" macro in arch/arm/include/asm/assembler.h and change all "bx lr" code to "ret lr" in functions that may run on ARMv4. Linux source code deals with this problem in the same manner. v1 -> v2: Comment update. Pointed out by Andre Przywara. Signed-off-by:Sergei Antonov <saproj@gmail.com> CC: Samuel Holland <samuel@sholland.org> CC: Ye Li <ye.li@nxp.com> CC: Simon Glass <sjg@chromium.org> CC: Andre Przywara <andre.przywara@arm.com> CC: Marek Vasut <marex@denx.de> CC: Sean Anderson <sean.anderson@seco.com> CC: Tom Rini <trini@konsulko.com>
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This command is being introduced with the goal of allowing user-friendly "generic use case" U-Boot builds to pause until user input under some situations. The main use case would be when a boot failure happens, to pause until the user has had time to acknowledge the current state. Tested using: make && ./u-boot -v -T -c 'ut lib lib_test_hush_pause' Signed-off-by:Samuel Dionne-Riel <samuel@dionne-riel.com> Cc: Simon Glass <sjg@chromium.org>
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Try to load required DTB overlays if the board supports extensions and CONFIG_CMD_EXTENSION is enabled. Signed-off-by:Matwey V. Kornilov <matwey.kornilov@gmail.com>
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Tom Rini authored
- Assorted Kconfig migrations
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- Sep 01, 2022
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Enable d-cache early in SPL right after DRAM is started up. This reduces U-Boot proper load time by 650ms when loaded from SPI NOR. Signed-off-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Philip Oberfichtner <pro@denx.de>
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Introduce the new Kconfig symbol CONFIG_SPL_SYS_L2_PL310 to allow the SPL to build cache-pl310.c. Before this commit, the SPL could enable the PL310 L2 cache [1], but the cache maintenance functions from cache-pl310.c were only useable for non-SPL builds. After enabling the cache one must be able to flush it, too. Thus this commit allows cache-pl310.c to be included in the SPL build. [1] See for example arch/arm/mach-imx/cache.c: v7_outer_cache_enable() Signed-off-by: -
This converts CONFIG_SYS_L2_PL310 to Kconfig. For omap2 and mvebu the 'select SYS_L2_PL310' locations were determined using ./tools/moveconfig -i CONFIG_SYS_L2_PL310. For mx6 I manually chose ARCH_MX6 as 'select' location. The correctness has been verified using $ ./tools/moveconfig.py -f ARCH_MX6 ~SYS_L2_PL310 ~SYS_L2CACHE_OFF 0 matches That means whenever an ARCH_MX6 board had SYS_L2_PL310 disabled, this was correctly reflected in SYS_L2CACHE_OFF. Thus it's safe to insert the 'select' statement under ARCH_MX6. Signed-off-by:
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