- Oct 25, 2021
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Heinrich Schuchardt authored
Add a mailmap entry for me. Signed-off-by:Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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This commit fixes the following compilation warning of boottime->install_configuration_table() function. lib/efi_selftest/efi_selftest_tcg2.c:475:46: warning: passing argument 1 of ‘boottime->install_configuration_table’ discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] ret = boottime->install_configuration_table(&smbios_guid, dmi); Signed-off-by:
Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by:
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Support for the PPC74xx processors has been removed in commit d928664f ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support") more than 6 years ago already. So the corresponding README file can now be removed, too. Signed-off-by:
Thomas Huth <thuth@redhat.com> Signed-off-by:
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Heinrich Schuchardt authored
Support for PPC4XX processors has been removed. So we should not mention it in the documentation. Signed-off-by:
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https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini authored
- Add and enable watchdog driver - Prepare for SYSRESET driven AXP poweroff - Prepare for SoCs without MMC2 - Some fixes for extending SPL (SPL-DM for RISC-V) - Some preparations for proper VBUS management - Fix secure monitor move
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Allwinner R329 has no MMC2. Only include the code of MMC2 if the base address of it is defined. Signed-off-by:
Icenowy Zheng <icenowy@sipeed.com> Reviewed-by:
Andre Przywara <andre.przywara@arm.com> Signed-off-by:
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Some Allwinner SoCs (e.g. R329) doesn't have a MMC2 controller at all, and on boards that we do not utilize MMC2, the alias for it is just useless. Only include the alias when we specify CONFIG_MMC_SUNXI_EXTRA_SLOT to 2. Signed-off-by:
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For some reason, the watchdog was disabled in the H616 device tree. Most likely this is a copy-paste from the H6 device tree: the H6 watchdog is disabled because it is broken in some chips. However, there is no evidence of issues with the H616 watchdog. Enable the watchdog node so it can be used by the driver. Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
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https://gitlab.denx.de/u-boot/custodians/u-boot-imxTom Rini authored
u-boot-imx-20211022 ------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/9561 - i.MX8: - Toradex Verdin (switch to binman, cleanup, etc.) - Phytec phycore_imx8mm (fixes, boot from SPI-NOR) - fixes for imx8mp_evk - doc (i.MX): MX8MM with Fast boot - i.MX6: - Toradex : colibri-imx6ull with eMMC, fixes - i.MX7ULP : - preparation for OPTEE + Serial Number - generic: - imx8m_image: Support ddr3 firmware
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A watchdog helps recover from hangs or failure to boot an OS. It can also be used by the sysreset framework to intentionally reset the system. Now that a driver is available, let's enable this functionality on sunxi boards. Signed-off-by:
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This driver supports the sun4i/sun6i/sun20i watchdog timers. They have a maximum timeout of 16 seconds. Signed-off-by:
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The sunxi clock driver exposes a reset controller, so it selects the reset controller framework. Ensure that dependency is also satisfied when building the driver for the SPL. Signed-off-by:
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André Przywara authored
The more recent Allwinner SoCs BootROMs can actually load SPL images larger than 32KB. We use this on the H616 to fit the extra code needed for the PMIC into the image, and have provisions in board.c to respect that larger SPL size when booting from MMC. However the sunxi SPL SPI loader has a hardcoded load offset of 32KB, which will fail on the H616. To fix this, use the same algorithm we use for MMC: if the SPL size is smaller than 32KB, we use 32KB, otherwise we expect the U-Boot payload directly after the SPL code. This prepares for SPI booting with larger SPLs like on the H616. Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com>
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The AXP PMICs have the ability to power off the system. The existing code for this is duplicated for each PMIC variant, and uses the legacy non-DM "pmic_bus" interface. When SYSRESET is enabled, this can all be replaced with a sysreset device using the DM_PMIC interface. Since the trigger bit is the same on all PMIC variants, use the register definitions from the oldest supported PMIC. Signed-off-by:
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The sysreset uclass has an option to provide the do_poweroff() function. When that option is enabled, the AXP power drivers should not provide their own definition. For the AXP305, which is paired with 64-bit systems where TF-A provides PSCI, there is another possible conflict with the PSCI firmware driver. This driver can be enabled even if CONFIG_PSCI_RESET is disabled, so make sure to use the right symbol in the condition. Signed-off-by:
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A single DM-based driver should be able to support some feature for several PMIC variants where the interface is the same. For example, all PMIC variants use the same register bit to trigger poweroff. However, currently only definitions for a single PMIC are available at a time. This requires drivers to use #ifdefs and different indentifiers for each variant they support. Let's simplify this by making register definitions for all variants available from the header. Then no preprocessor conditions are needed; the driver can use the register definition from any variant that supports the relevant feature. An exception is the GPIO-related definitions, which do not use unique identifiers. So for now, keep them like before. They will be cleaned up along with the GPIO driver. Signed-off-by:
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This header attempted to avoid multiple inclusion using a header guard. But the preprocessor symbol was never defined, so the guard had no effect. Fix this by defining the symbol. Signed-off-by:
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When adding eGON support to mkimage, the struct boot_file_head definition was moved to its own header. This is the only thing mksunxiboot needed out of asm/arch/spl.h. Clean up the relative include by switching to new header. Signed-off-by:
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commit 1ebfc0c6 ("sunxi: A23/A33/H3: Move sun8i secure monitor to SRAM A2") attempted to move the secure monitor to SRAM A2. But not all sun8i SoCs have SRAM A2, so a check was put in for SUNXI_SRAM_A2_SIZE to avoid breaking the other SoCs. However, because the header providing SUNXI_SRAM_A2_SIZE was not included, this unintentionally skipped the new definitions on all SoCs. Fix this by including the right header. Fixes: 1ebfc0c6 ("sunxi: A23/A33/H3: Move sun8i secure monitor to SRAM A2") Signed-off-by:
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The device tree binding provides for getting VBUS state from a device referenced by phandle, as an optional alternative to using a GPIO. In U-Boot, where there is no power supply class, this VBUS detection will be implemented using a regulator device and its get_enable method. Let's hook this up to the PHY driver. Signed-off-by:
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The Linux driver checks the VBUS detection GPIO first; then VBUS power supply; then finally assumes VBUS is present. When adding VBUS power supply support, we want to match that order, so we get the same behavior in case both a GPIO and a power supply are provided in the device tree. So refactor the function a bit to remove the early return, and use the same "assume VBUS is present" final fallback. Signed-off-by:
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Both of these messages log the GPIO number of the ID detection GPIO, which is not terribly useful, especially in the VBUS detection function. Signed-off-by:
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sunxi-common.h defines CONFIG_SPL_BSS_START_ADDR to put SPL's BSS in DRAM. Due to this, we must select SPL_SEPARATE_BSS, or else SPL will attempt to load its DTB from the wrong address (after BSS in DRAM). This change fixes booting with SPL_OF_CONTROL=y. Signed-off-by:
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- Oct 23, 2021
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https://source.denx.de/u-boot/custodians/u-boot-spiTom Rini authored
- Fix mtd erase with mtdpart (Marek Behún) - NXP fspi driver fixes (Kuldeep Singh)
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Errata ERR050568 description says that "Flash access by FlexSPI AHB command may not work with platform frequency equal to 300 MHz" on LS1028A. By default, smaller length reads(equal to RX FIFO size) are done by IP bus and larger length reads using AHB bus. For adding errata workaround, use IP bus to read entire flash contents and disable AHB path when platform frequency is 300Mhz. Signed-off-by:
Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by:
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Add support for disabling AHB bus and read entire flash contents via IP bus only. Please note, this enables IP bus read using a quirk which can be enabled directly in device-type data or in existence of an errata where AHB bus may need to be disabled. Signed-off-by:
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The mt25qu512a supports 4K or 64K sectors, so adding SECT_4K to enable 4K sector usage. Tested on Intel n5x hardware with QSPI carrier card Signed-off-by:
Kris Chaplin <kris.chaplin@linux.intel.com> Acked-by:
Pratyush Yadav <p.yadav@ti.com> [jagan: droped Tested-by of patch author and datasheet link] Signed-off-by:
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Add is25lp512 and is25wp512 devices to spi-nor id table Tested on Intel n5x hardware with QSPI carrier card Signed-off-by:
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The original purpose of mtd_erase_callback() in Linux at the time it was imported to U-Boot, was to inform the caller that erasing is done (since it was an asynchronous operation). All supplied callback methods in U-Boot do nothing, but the mtd_erase_callback() function was (until previous patch) grossly abused in U-Boot's mtdpart implementation for completely different purpose. Since we got rid of the abusement, remove the mtd_erase_callback() function and the .callback member from struct erase_info entirely, in order to avoid such problems in the future. Signed-off-by:Marek Behún <marek.behun@nic.cz>
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The _erase() method of the mtdpart driver, part_erase(), currently implements offset shifting (for given mtdpart partition) in a weird way: 1. part_erase() adds partition offset to block address 2. parent driver's _erase() method is called 3. parent driver's _erase() method calls mtd_erase_callback() 4. mtd_erase_callback() subtracts partition offset from block address so that the callback function is given correct address The problem here is that if the parent's driver does not call mtd_erase_callback() in some scenario (this was recently a case for spi_nor_erase(), which did not call mtd_erase_callback() at all), the offset is not shifted back. Moreover the code would be more readable if part_erase() not only added partition offset before calling parent's _erase(), but also subtracted it back afterwards. Currently the mtd_erase_callback() is expected to do this subtracting since it does have to do it anyway. Add the more steps to this procedure: 5. mtd_erase_callback() adds partition offset to block address so that it returns the the erase_info structure members as it received them 6. part_erase() subtracts partition offset from block address This makes the code more logical and also prevents errors in case parent's driver does not call mtd_erase_callback() for some reason. (BTW, the purpose of mtd_erase_callback() in Linux is to inform the caller that it is done, since in Linux erasing is done asynchronously. We are abusing the purpose of mtd_erase_callback() in U-Boot for completely different purpose. The callback function itself has empty implementation in all cases in U-Boot.) Signed-off-by:Simon Glass <sjg@chromium.org> Tested-by:
Masami Hiramatsu <masami.hiramatsu@linaro.org>
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May it possible to interrupt the spi_nor_erase() function. Signed-off-by:
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The spi_nor_erase() function does not call mtd_erase_callback() as it should. The mtdpart code currently implements the subtraction of partition offset in mtd_erase_callback(). This results in partition offset being added prior calling spi_nor_erase(), but not subtracted back on return. The result is that the `mtd erase` command does not erase the whole partition, only some of it's blocks: => mtd erase "Rescue system" Erasing 0x00000000 ... 0x006fffff (1792 eraseblock(s)) jedec_spi_nor spi-nor@0: at 0x100000, len 4096 jedec_spi_nor spi-nor@0: at 0x201000, len 4096 jedec_spi_nor spi-nor@0: at 0x302000, len 4096 jedec_spi_nor spi-nor@0: at 0x403000, len 4096 jedec_spi_nor spi-nor@0: at 0x504000, len 4096 jedec_spi_nor spi-nor@0: at 0x605000, len 4096 jedec_spi_nor spi-nor@0: at 0x706000, len 4096 This is obviously wrong. Add proper calling of mtd_erase_callback() into the spi_nor_erase() function. Signed-off-by:
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This check is already done in all callers: mtdcore's mtd_write() / mtd_erase(), legacy spi_nor_write() / spi_flash_erase(). No reason to do this here as well. Signed-off-by: -
Check for zero length in the legacy spi_flash_read() / spi_flash_write() / spi_flash_erase() functions. On zero length, return 0 immediately, don't call the underlying method. Rationale: - these legacy functions call the _read(), _write() and _erase() methods of struct mtd - the DM callers of these methods already check for zero length - making all callers of these methods check for zero length makes it possible to remove the check from implementations of these _read(), _write() and _erase() methods Signed-off-by: -
The cleanup code of spi_nor_erase() function calls write_disable(), but does not return it's return value even in case of failure. Fix this. Signed-off-by:
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The cleanup code of the spi_nor_erase() function overwrites the ret variable with return value of clean_bar(), even if the ret variable is already set. Fix this. Signed-off-by:
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The spi_nor_erase() function does not check return value of the write_enable() call. Fix this. Signed-off-by:
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Use the cleanup codepath of spi_nor_erase() also in the event of failure of writing the BAR register. Signed-off-by:
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The S25FL256L is a part of the S25FL-L family and has the same feature set as S25FL128L except the density. The datasheet can be found in the following link. https://www.cypress.com/file/316171/download The S25FL256L is 32MB NOR Flash that does not support Bank Address Register. This fixup is activated if CONFIG_SPI_FLASH_BAR is enabled and returns ENOTSUPP in setup() hook to avoid further ops. Tested on Xilinx Zynq-7000 FPGA board. Signed-off-by:
Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
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Add Gigadevice GD25LQ256D SPI NOR chip. https://www.gigadevice.com/datasheet/gd25lq256d/ Signed-off-by:
Yanhong Wang <yanhong.wang@starfivetech.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
[jagan: updated commit message]
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