- Dec 14, 2020
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Brad Kim authored
Not s2 register, t1 register is correct Fortunately, it works because t1 register has a garbage value Signed-off-by:
Brad Kim <brad.kim@semifive.com> Reviewed-by:
Lukas Auer <lukas@auer.io> Reviewed-by:
Leo Liang <ycliang@andestech.com>
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- Dec 11, 2020
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https://gitlab.denx.de/u-boot/custodians/u-boot-atmelTom Rini authored
Second set of u-boot-atmel fixes for 2021.01 cycle This set includes very important fixes for: MMC booting on several boards, drive strength on sam9x60ek mmc lines, compile issues for timer.c old driver, removal of unwanted access to sam9x60 bit for oscillator bypass mode, and eeproms read on sama5d2_icp.
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Eugen Hristev authored
The correct compatible for this eeproms is microchip,24aa02e48 The previous compatible string was working up to U-boot 2020.04. Signed-off-by:
Eugen Hristev <eugen.hristev@microchip.com> Tested-by:
Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini authored
- Add lx2162 soc, lx2162qds support. - Bug-fixes related ls102x-usb, ifc, bootcmd, secure-boot header, - rgmii, vid, fdt, env variable, pci for Layerscape products
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- Dec 10, 2020
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make lx2162aqds platform to enable gpio driver. Signed-off-by:
Hui Song <hui.song_1@nxp.com> Signed-off-by:
Ran Wang <ran.wang_1@nxp.com> [Rebased] Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com>
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The USB support is not by default enabled on all designs, so it does not make seance to have USB specific erratum's enabled on such a designs. On our internal Hitachi-Powergrids design not using the USB controller there is a crash when accessing those specific memory locations selected by the erratum flags. Signed-off-by:
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Reviewed-by:
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To drive TE pin high is supported IFC configuration that can be used on some designs. Signed-off-by:
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If the board isn't strapped to enable USB1 then attempting to access it will result in a hang. Avoid this by allowing boards to define CONFIG_USB_MAX_CONTROLLER_COUNT. Signed-off-by:
Chris Packham <judge.packham@gmail.com> Reviewed-by:
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When booting from TF-A there is a logic that attempt to detect if the default environment is used, if this is the case it then set the `bootcmd` and `mcinitcmd` depending of the device we booted from. This detection logic is dubious as it access internals of the env implementation and it doesn't always work correctly. First of all it detect any valid environment as not being the default, so after running `env default -a && saveenv` the board doesn't boot anymore as `bootcmd` is then empty. But it also fails in some other ways, for example it always detect a default environment when redundant env is enabled on MMC, so in that case `bootcmd` is overwritten on every boot. Instead of increasing the complexity of the detection just check if `bootcmd` and `mcinitcmd` are set in the environment and set them if they are not. Signed-off-by:
Alban Bedel <alban.bedel@aerq.com> Reviewed-by:
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Read PFE ESBC header flash with spi_flash_read API - logs as follows, Net: SF: Detected s25fs512s with page size 256 Bytes, erase size 256 KiB, total 64 MiB "Synchronous Abort" handler, esr 0x96000210 elr: 000000008206db44 lr : 0000000082004ea0 (reloc) elr: 00000000b7ba6b44 lr : 00000000b7b3dea0 x0 : 00000000b79407e8 x1 : 0000000040640000 x2 : 0000000000000050 x3 : 0000000000000000 x4 : 000000000000000a x5 : 0000000000000050 x6 : 0000000000000366 x7 : 00000000b7942308 x8 : 00000000b76407c0 x9 : 0000000000000008 x10: 0000000000000044 x11: 00000000b7634d1c x12: 000000000000004f x13: 0000000000000044 x14: 00000000b7634d98 x15: 00000000b76407c0 x16: 0000000000000000 x17: 0000000000000000 x18: 00000000b7636dd8 x19: 0000000000000000 x20: 00000000b79407d0 x21: 00000000b79407e8 x22: 0000000040640000 x23: 00000000b7634e58 x24: 0000000000000000 x25: 0000000003800000 x26: 00000000b7bdd000 x27: 0000000000000000 x28: 0000000000000000 x29: 00000000b7634d10 Code: d2800003 eb03005f 54000101 d65f03c0 (f8636826) Resetting CPU ... Signed-off-by:
Biwen Li <biwen.li@nxp.com> Reviewed-by:
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Update kernel_size_sd variable with correct value for lx2160a. Signed-off-by:
Manish Tomar <manish.tomar@nxp.com> Reviewed-by:
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Update kernelheader_addr and kernelheader_addr variables with correct values for ls1043a. Signed-off-by:
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Check for NULL return value from fdt_getprop() in fdt_fixup_remove_jr() Signed-off-by:
Priyanka Singh <priyanka.singh@nxp.com> [Fixed checkpatch errors/warnings] Signed-off-by:
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Make sure all RGMII internal delay modes are covered. Signed-off-by:
Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by:
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Make sure all RGMII internal delay modes are covered. Signed-off-by:
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Initialize variable 'i2caddress' in adjust_vdd() to zero Signed-off-by:
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This adds default environment variable for ls1012aqds Signed-off-by:
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Fix a bug that failed to read/write eeprom on ls1021atsn Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by:
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Fixes: commit 8ec619f8 ("pci: layerscape: Fixup PCIe EP mode DT nodes for LX2160A rev2") This added the PCIe EP nodes fixup of LX2160A, but it didn't update the condition value when there isn't a property 'apio-wins'. Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Fixed checkpatch error] Signed-off-by:
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Enable eMMC HS400 mode support on LX2162AQDS. Signed-off-by:
Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by:
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Enable CONFIG_BOARD_EARLY_INIT_R for SDHC adapter card identification and configuration. Signed-off-by:
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Enable support to compile OPTEE driver, access AVB TA and RPMB API's access via RPC from OPTEE for lx2162 Signed-off-by:
Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by:
Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by:
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This patch add base support for LX2162AQDS board. LX2162AQDS board supports LX2162A family SoCs. This patch add basic support of platform. Signed-off-by:
Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by:
Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by:
Vikas Singh <vikas.singh@nxp.com> Signed-off-by:
Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> [Rebased] Signed-off-by:
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LX2162 is LX2160 based SoC, it has same die as of LX2160 with different packaging. LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module, microSD card, eMMC support, serial console, qspi nor flash, qsgmii, sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes interface to support three PCIe gen3 interface. Signed-off-by:
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Move CORTINA_NO_FW_UPLOAD to Kconfig file so that it can be controlled via defconfig files. Signed-off-by:
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resource "config" is required to have minimum 4KB space to access all config space of PCI Express EP. Signed-off-by:
Wasim Khan <wasim.khan@nxp.com> Reviewed-by:
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resource "config" is required to have minimum 8KB space as per hardware documentation. Signed-off-by:
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
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Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by:
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Print pcie controller number starting from 1 Signed-off-by: -
Print pcie controller number starting from 1 Signed-off-by:
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LX2160A-Rev1 uses PCIe layerscape Gen4 controller. Enable CONFIG_PCIE_LAYERSCAPE_GEN4 for lx2160a. Signed-off-by:
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- Dec 09, 2020
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https://gitlab.denx.de/u-boot/custodians/u-boot-stmTom Rini authored
- Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board - Update ARM STI and ARM STM STM32MP Arch maintainers emails - Enable internal pull-ups for SDMMC1 on DHCOM SoM
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Add USB OTG ID pin mux and switch the USB OTG port from peripheral to OTG mode. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by:
Patrick Delaunay <patrick.delaunay@foss.st.com> -
The DH DRC02 board has an on-board microSD slot, add DT properties to enable the slot. Signed-off-by:
Patrick Delaunay <patrick.delaunay@foss.st.com>
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