- Aug 22, 2023
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Since the Patch 55171aed, VisionFive2 booting has been broken [1]. VisionFive2 board requires to enable CONFIG_TIMER_EARLY but booting went to panic from initr_dm_devices due to lack of a timer device. - Error logs initcall sequence 00000000fffd8d38 failed at call 00000000402185e4 (err=-19) Thus, we need to move riscv_cpu_probe function in order to register the timer earlier than initr_dm_devices. Fixes: 7fe32b34 ("event: Convert arch_cpu_init_dm() to use events") Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Signed-off-by:
Chanho Park <chanho61.park@samsung.com> Tested-by:
Milan P. Stanić <mps@arvanta.net> Tested-by:
Roland Ruckerbauer <mail@ruabmbua.dev> Tested-by:
Roland Ruckerbauer <mail@ruabmbua.dev>
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This patch introduces EVT_DM_POST_INIT_R event type for handling hooks after relocation. Fixes: 55171aed ("dm: Emit the arch_cpu_init_dm() even only before relocation") Suggested-by:
Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Signed-off-by:
Chanho Park <chanho61.park@samsung.com> Tested-by:
Milan P. Stanić <mps@arvanta.net> Reviewed-by:
Simon Glass <sjg@chromium.org> Tested-by:
Roland Ruckerbauer <mail@ruabmbua.dev> Tested-by:
Roland Ruckerbauer <mail@ruabmbua.dev> Fixed missing event name in event.c: Signed-off-by:
Simon Glass <sjg@chromium.org>
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- Aug 21, 2023
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@konsulko.com>
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- Aug 20, 2023
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Handle both 32bit and 64bit systems, i.e. sandbox and sandbox64 the same way drivers/cpu/cpu_sandbox.c does, that is in case CONFIG_PHYS_64BIT is enabled, assume 64bit address width, else assume 32bit address width. This fixes ut_dm_dm_test_cpu test failure on sandbox64. Signed-off-by:
Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Align the sandbox64 defconfig with sandbox defconfig. Enable missing PCI register multi-entry support. This fixes ut_dm_dm_test_pci_bus_to_phys test . Signed-off-by:
Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Align the sandbox64 defconfig with sandbox defconfig. Enable missing CCF and Sandbox CCF drivers. This fixes ut_dm_dm_test_clk_ccf test . Signed-off-by:
Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Align the sandbox64 defconfig with sandbox defconfig. Enable missing 12x22 font support. This fixes ut_dm_dm_test_video_text_12x22 test . Signed-off-by:
Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Align the sandbox64 defconfig with sandbox defconfig. Enable missing 16bpp and 24bpp video support. This fixes ut_dm_dm_test_video_bmp16 and ut_dm_dm_test_video_bmp24 tests . Signed-off-by:
Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Align the sandbox64 defconfig with sandbox defconfig. Enable missing PINCTRL single driver. This fixes ut_dm_dm_test_pinctrl_single test . Signed-off-by:
Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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The pinctrl-single driver uses %pa to print register value in its single_get_pin_muxing() output. Handle this properly in the test based on CONFIG_PHYS_64BIT . Signed-off-by:
Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Align the sandbox64 defconfig with sandbox defconfig. Enable missing BUTTON ADC driver. This fixes ut_dm_dm_test_button_keys_adc test . Signed-off-by:
Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Align the sandbox64 defconfig with sandbox defconfig. Enable missing MC34708 PMIC driver. This fixes ut_dm_dm_test_power_pmic_mc34708_get test . Signed-off-by:
Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Align the sandbox64 defconfig with sandbox defconfig. Increase the console record size. This fixes ut_bootstd_bootflow_cmd_scan_e . Signed-off-by:
Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Align the sandbox64 defconfig with sandbox defconfig. Enable missing SPI NOT bootdev. This fixes ut_bootstd_bootdev_test_cmd_hunt test . Signed-off-by:
Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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- Aug 19, 2023
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Paul Barker authored
In rmobile_cpuinfo_idx() there is an off-by-one error in accessing the rmobile_cpuinfo array. At the end of the loop, i is equal to the array size, i.e. rmobile_cpuinfo[i] accesses one entry past the end of the array. The last entry in the array is a fallback value so the loop should count to ARRAY_SIZE(rmobile_cpuinfo) - 1 instead, this will leave i equal to the index of the fallback value if no match is found. Signed-off-by:
Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Marek Vasut <marek.vasut+renesas@mailbox.org>
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https://source.denx.de/u-boot/custodians/u-boot-efiTom Rini authored
Pull request doc-2023-10-rc3-2 Documentation: * csf_examples: csf.sh: Remove unneeded export ATF_LOAD_ADDR line * printf() codes: correct format specifier for unsigned int * Fix typos in clk.h, irq.h. * Correct description of proftool Other: * Quieten test for erofs filesystem presence * spl: don't assume NVMe partition 1 exists
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Originally, exporting the ATF_LOAD_ADDR was required, but since binman has been used to generate the flash.bin, it is no longer needed to do such manual export. The ATF address is now passed via binman. Remove the unneeded export ATF_LOAD_ADDR line. Signed-off-by:
Fabio Estevam <festevam@denx.de>
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Signed-off-by:
Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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Signed-off-by:
Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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The format specifier for the "unsigned int" variable is documented as "%d". However, it should be "%u". Thus, fix it. Fixes: f5e90350 ("doc: printf() codes") Reported-by:
Tom Rini <trini@konsulko.com> Signed-off-by:
Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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The usage of proftool in docs is incorrect. If proftool is used without '-o' argument, it will show the usage like following $ ./sandbox/tools/proftool -m sandbox/System.map -t trace -f funcgraph dump-ftrace >trace.dat Must provide trace data, System.map file and output file Usage: proftool [-cmtv] <cmd> <profdata> Change '>' to '-o' to fix it. Signed-off-by:
Puhan Zhou <puh4n.zhou@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Heinrich Schuchardt authored
There is no requirement that a partition 1 exists in a partition table. We should not try to retrieve information about it. We should not even try reading with partition number CONFIG_SYS_NVME_BOOT_PARTITION here as this is done in the fs_set_blk_dev() call anyway. Fixes: 8ce6a2e1 ("spl: blk: Support loading images from fs") Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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At present listing a partition produces lots of errors about this filesystem: => part list mmc 4 cannot find valid erofs superblock cannot find valid erofs superblock cannot read erofs superblock: -5 [9 more similar lines] Use debugging rather than errors when unable to find a signature, as is done with other filesystems. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Gao Xiang <hsiangkao@linux.alibaba.com> Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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- Aug 18, 2023
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Rename defconfig to include SoC name, use similar pattern as other RK356x boards: <soc>-<name>.dts -> <name>-<soc>_defconfig Suggested-by:
Kever Yang <kever.yang@rock-chips.com> Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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https://source.denx.de/u-boot/custodians/u-boot-tegraTom Rini authored
ARM: tegra: Changes for v2023.10-rc1 This adds support for various new Tegra30 boards (ASUS, LG and HTC) and has some other minor enhancements, such as enabling the poweroff command on several Tegra210 and Tegra186 boards.
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- Aug 17, 2023
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Tom Rini authored
- More MAINTAINERS updates, update CI to use a newer coreboot and make arm-ffa a bit less verbose by default.
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Add myself as a reviewer for RK3566/RK3568/RK3588 boards that I have and can help with review and testing of defconfig and device tree changes. Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Acked-by:
Eugen Hristev <eugen.hristev@collabora.com>
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Update MAINTAINERS files for RK3566/RK3568/RK3588 boards to include related device tree files. Also replace space with tabs. Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Acked-by:
Eugen Hristev <eugen.hristev@collabora.com>
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Update Rockchip documentation to include RK3566/RK3568 boards already supported. Also list Pine64 boards under RK3566 and drop defconfig to match other listed boards. Signed-off-by:
Jonas Karlman <jonas@kwiboo.se>
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Dropping Faiz Abbas from the UFS maintainer list as his e-mail ID is no longer valid. Adding Bhupesh Sharma who has been using this framework working on Qualcomm Snapdragon SoCs as well as sending out fixes. Adding myself as well to support in reviewing and testing patches. Signed-off-by:
Neha Malcom Francis <n-francis@ti.com> Reviewed-by:
Nishanth Menon <nm@ti.com> Acked-by:
Marek Vasut <marek.vasut+renesas@mailbox.org>
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Use a recent coreboot build for this test. The coreboot commit is: 6f5ead14b4 mb/google/nissa/var/joxer: Update eMMC DLL settings This is build with default settings, i.e. QEMU x86 i440fx/piix4 Add some documentation as to how to update it next time. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Update MAINTAINERS of corstone1000 board. Signed-off-by:
Xueliang Zhong <xueliang.zhong@arm.com> Signed-off-by:
Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
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replace info logs with debug logs Signed-off-by:
Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Tom Rini authored
In order to reduce the number of people that are cc'd on a patch for simply touching arch/arm/dts/Makefile (which is a big common file) add an entry specifically to MAINTAINERS under the ARM entry. Signed-off-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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- Aug 16, 2023
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https://source.denx.de/u-boot/custodians/u-boot-stmTom Rini authored
DHSOM: Power cycle Buck3 in reset DHCOM: Switch DWMAC RMII clock to MCO2 stm32f746: fix display pinmux stm32mp: psci: Inhibit PDDS because CSTBYDIS is set stm32mp1: DT alignment with v6.4 stm32mp1: add splashscreen with STMicroelectronics logo stm32mp1: clk: remove error for disabled clock in stm32mp1_clk_get_parent serial: stm32: Extend TC timeout
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Waiting 150us TC bit couldn't be enough. If TFA lets 16 bits in USART fifo, we has to wait 16 times 87 us (time of 10 bits (1 byte in most use cases) at a baud rate of 115200). Fixes: b4dbc5d6 ("serial: stm32: Wait TC bit before performing initialization") Signed-off-by:
Valentin Caron <valentin.caron@foss.st.com> Signed-off-by:
Patrice Chotard <patrice.chotard@foss.st.com>
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The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK pad for the PHY and the same 50 MHz clock are fed back to ETHRX via internal eth_clk_fb clock connection OR (2) ETH_CLK is not used at all, MCO2 generates 50 MHz clock on MCO2 output pad for the PHY and the same MCO2 clock are fed back into ETHRX via ETH_RX_CLK input pad using external pad-to-pad connection. Option (1) has two downsides. ETHCK_K is supplied directly from either PLL3_Q or PLL4_P, hence the PLL output is limited to exactly 50 MHz and since the same PLL output is also used to supply SDMMC blocks, the performance of SD and eMMC access is affected. The second downside is that using this option, the EMI of the SoM is higher. Option (2) solves both of those problems, so implement it here. In this case, the PLL4_P is no longer limited and can be operated faster, at 100 MHz, which improves SDMMC performance (read performance is improved from ~41 MiB/s to ~57 MiB/s with dd if=/dev/mmcblk1 of=/dev/null bs=64M count=1). The EMI interference also decreases. Ported from Linux kernel commit 73ab99aad50cd ("ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM") Signed-off-by:
Marek Vasut <marex@denx.de> Reviewed-by:
Patrice Chotard <patrice.chotard@foss.st.com>
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Display the STMicroelectronics logo with features VIDEO_LOGO and SPLASH_SCREEN on STMicroelectronics boards. With CONFIG_SYS_VENDOR = "st", the logo st.bmp is selected, loaded at the address indicated by splashimage and centered with "splashpos=m,m". Signed-off-by:
Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by:
Patrice Chotard <patrice.chotard@foss.st.com>
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