Concept for handling caches not managed via CP15 on ARM 32bit
The UEFI specification requires that data and instruction caches are enabled. But on ARM 32bit architecturally defined caches should not be enabled. These are those caches not managed via CP15. All architectures that reference CONFIG_SYS_L2CACHE_OFF have architecturally defined caches. There are yet others. E.g.
GRUB version below 2.04 requires all caches to be disabled on ARM 32bit.