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CONFIG_SMC_USE_IOFUNCS
Define this to use i/o functions instead of macros
(some hardware wont work with macros)
CONFIG_DRIVER_TI_EMAC
Support for davinci emac
CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
Define this if you have more then 3 PHYs.
CONFIG_FTGMAC100
Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
CONFIG_FTGMAC100_EGIGA
Define this to use GE link update with gigabit PHY.
Define this if FTGMAC100 is connected to gigabit PHY.
If your system has 10/100 PHY only, it might not occur
wrong behavior. Because PHY usually return timeout or
useless data when polling gigabit status and gigabit
control registers. This behavior won't affect the
correctnessof 10/100 link speed update.
CONFIG_SMC911X
Support for SMSC's LAN911x and LAN921x chips
CONFIG_SMC911X_BASE
Define this to hold the physical address
of the device (I/O space)
CONFIG_SMC911X_32_BIT
CONFIG_SMC911X_16_BIT
Define this if data bus is 16 bits. If your processor
automatically converts one 32 bit word to two 16 bit
words you may also try CONFIG_SMC911X_32_BIT.
CONFIG_SH_ETHER
Support for Renesas on-chip Ethernet controller
CONFIG_SH_ETHER_USE_PORT
Define the number of ports to be used
CONFIG_SH_ETHER_PHY_ADDR
Define the ETH PHY's address
CONFIG_SH_ETHER_CACHE_WRITEBACK
If this option is set, the driver enables cache flush.
- PWM Support:
CONFIG_PWM_IMX
Support for PWM module on the imx6.
CONFIG_TPM
Support TPM devices.
CONFIG_TPM_TIS_INFINEON
Support for Infineon i2c bus TPM devices. Only one device
per system is supported at this time.
CONFIG_TPM_TIS_I2C_BURST_LIMITATION
Define the burst count bytes upper limit
CONFIG_TPM_ST33ZP24
Support for STMicroelectronics TPM devices. Requires DM_TPM support.
CONFIG_TPM_ST33ZP24_I2C
Support for STMicroelectronics ST33ZP24 I2C devices.
Requires TPM_ST33ZP24 and I2C.
CONFIG_TPM_ST33ZP24_SPI
Support for STMicroelectronics ST33ZP24 SPI devices.
Requires TPM_ST33ZP24 and SPI.
CONFIG_TPM_ATMEL_TWI
Support for Atmel TWI TPM device. Requires I2C support.
Support for generic parallel port TPM devices. Only one device
per system is supported at this time.
CONFIG_TPM_TIS_BASE_ADDRESS
Base address where the generic TPM device is mapped
to. Contemporary x86 systems usually map it at
0xfed40000.
CONFIG_TPM
Define this to enable the TPM support library which provides
functional interfaces to some TPM commands.
Requires support for a TPM device.
CONFIG_TPM_AUTH_SESSIONS
Define this to enable authorized functions in the TPM library.
Requires CONFIG_TPM and CONFIG_SHA1.
- USB Support:
At the moment only the UHCI host controller is
supported (PIP405, MIP405); define
CONFIG_USB_UHCI to enable it.
define CONFIG_USB_KEYBOARD to enable the USB Keyboard
and define CONFIG_USB_STORAGE to enable the USB
storage devices.
Note:
Supported are USB Keyboards and USB Floppy drives
(TEAC FD-05PUB).
CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
txfilltuning field in the EHCI controller on reset.
CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
HW module registers.
- USB Device:
Define the below if you wish to use the USB console.
Once firmware is rebuilt from a serial console issue the
command "setenv stdin usbtty; setenv stdout usbtty" and
attach your USB cable. The Unix command "dmesg" should print
it has found a new device. The environment variable usbtty
can be set to gserial or cdc_acm to enable your device to
Common Device Class Abstract Control Model serial device.
If you select usbtty = gserial you should be able to enumerate
a Linux host by
# modprobe usbserial vendor=0xVendorID product=0xProductID
else if using cdc_acm, simply setting the environment
variable usbtty to be cdc_acm should suffice. The following
might be defined in YourBoardName.h
CONFIG_USB_DEVICE
Define this to build a UDC device
CONFIG_USB_TTY
Define this to have a tty type of device available to
talk to the UDC device
CONFIG_USBD_HS
Define this to enable the high speed support for usb
device and usbtty. If this feature is enabled, a routine
int is_usbd_high_speed(void)
also needs to be defined by the driver to dynamically poll
whether the enumeration has succeded at high speed or full
speed.
CONFIG_SYS_CONSOLE_IS_IN_ENV
Define this if you want stdin, stdout &/or stderr to
be set to usbtty.
If you have a USB-IF assigned VendorID then you may wish to
define your own vendor specific values either in BoardName.h
CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
should pretend to be a Linux device to it's target host.
CONFIG_USBD_MANUFACTURER
Define this string as the name of your company for
- CONFIG_USBD_MANUFACTURER "my company"
CONFIG_USBD_PRODUCT_NAME
Define this string as the name of your product
- CONFIG_USBD_PRODUCT_NAME "acme usb device"
CONFIG_USBD_VENDORID
Define this as your assigned Vendor ID from the USB
Implementors Forum. This *must* be a genuine Vendor ID
to avoid polluting the USB namespace.
- CONFIG_USBD_VENDORID 0xFFFF
CONFIG_USBD_PRODUCTID
Define this as the unique Product ID
for your device
- CONFIG_USBD_PRODUCTID 0xFFFF
- ULPI Layer Support:
The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
the generic ULPI layer. The generic layer accesses the ULPI PHY
via the platform viewport, so you need both the genric layer and
the viewport enabled. Currently only Chipidea/ARC based
viewport is supported.
To enable the ULPI layer support, define CONFIG_USB_ULPI and
CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
If your ULPI phy needs a different reference clock than the
standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
the appropriate value in Hz.
The MMC controller on the Intel PXA is supported. To
enable this define CONFIG_MMC. The MMC can be
accessed from the boot prompt by mapping the device
to physical memory similar to flash. Command line is
enabled with CONFIG_CMD_MMC. The MMC driver also works with
the FAT fs. This is enabled with CONFIG_CMD_FAT.
CONFIG_SH_MMCIF
Support for Renesas on-chip MMCIF controller
CONFIG_SH_MMCIF_ADDR
Define the base address of MMCIF registers
CONFIG_SH_MMCIF_CLK
Define the clock frequency for MMCIF
CONFIG_SUPPORT_EMMC_BOOT
Enable some additional features of the eMMC boot partitions.
CONFIG_SUPPORT_EMMC_RPMB
Enable the commands for reading, writing and programming the
key for the Replay Protection Memory Block partition in eMMC.
- USB Device Firmware Update (DFU) class support:
CONFIG_USB_FUNCTION_DFU
This enables the USB portion of the DFU USB class
CONFIG_DFU_MMC
This enables support for exposing (e)MMC devices via DFU.
CONFIG_DFU_NAND
This enables support for exposing NAND devices via DFU.
CONFIG_DFU_RAM
This enables support for exposing RAM via DFU.
Note: DFU spec refer to non-volatile memory usage, but
allow usages beyond the scope of spec - here RAM usage,
one that would help mostly the developer.
CONFIG_SYS_DFU_DATA_BUF_SIZE
Dfu transfer uses a buffer before writing data to the
raw storage device. Make the size (in bytes) of this buffer
configurable. The size of this buffer is also configurable
through the "dfu_bufsiz" environment variable.
CONFIG_SYS_DFU_MAX_FILE_SIZE
When updating files rather than the raw storage device,
we use a static buffer to copy the file into and then write
the buffer once we've been given the whole file. Define
this to the maximum filesize (in bytes) for the buffer.
Default is 4 MiB if undefined.
DFU_DEFAULT_POLL_TIMEOUT
Poll timeout [ms], is the timeout a device can send to the
host. The host must wait for this timeout before sending
a subsequent DFU_GET_STATUS request to the device.
DFU_MANIFEST_POLL_TIMEOUT
Poll timeout [ms], which the device sends to the host when
entering dfuMANIFEST state. Host waits this timeout, before
sending again an USB request to the device.
- USB Device Android Fastboot support:
Paul Kocialkowski
committed
CONFIG_USB_FUNCTION_FASTBOOT
This enables the USB part of the fastboot gadget
CONFIG_ANDROID_BOOT_IMAGE
This enables support for booting images which use the Android
image format header.
CONFIG_FASTBOOT_BUF_ADDR
The fastboot protocol requires a large memory buffer for
downloads. Define this to the starting RAM address to use for
downloaded images.
CONFIG_FASTBOOT_BUF_SIZE
The fastboot protocol requires a large memory buffer for
downloads. This buffer should be as large as possible for a
platform. Define this to the size available RAM for fastboot.
CONFIG_FASTBOOT_FLASH
The fastboot protocol includes a "flash" command for writing
the downloaded image to a non-volatile storage device. Define
this to enable the "fastboot flash" command.
CONFIG_FASTBOOT_FLASH_MMC_DEV
The fastboot "flash" command requires additional information
regarding the non-volatile storage device. Define this to
the eMMC device that fastboot should use to store the image.
CONFIG_FASTBOOT_GPT_NAME
The fastboot "flash" command supports writing the downloaded
image to the Protective MBR and the Primary GUID Partition
Table. (Additionally, this downloaded image is post-processed
to generate and write the Backup GUID Partition Table.)
This occurs when the specified "partition name" on the
"fastboot flash" command line matches this value.
The default is "gpt" if undefined.
CONFIG_FASTBOOT_MBR_NAME
The fastboot "flash" command supports writing the downloaded
image to DOS MBR.
This occurs when the "partition name" specified on the
"fastboot flash" command line matches this value.
If not defined the default value "mbr" is used.
- Journaling Flash filesystem support:
Define these for a default partition on a NAND device
CONFIG_SYS_JFFS2_FIRST_SECTOR,
CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
Define these for a default partition on a NOR device
See Kconfig help for available keyboard drivers.
CONFIG_KEYBOARD
Define this to enable a custom keyboard support.
This simply calls drv_keyboard_init() which must be
defined in your board-specific files. This option is deprecated
and is only used by novena. For new boards, use driver model
instead.
CONFIG_FSL_DIU_FB
Enable the Freescale DIU video driver. Reference boards for
SOCs that have a DIU should define this macro to enable DIU
support, and should also define these other macros:
CONFIG_SYS_DIU_ADDR
CONFIG_VIDEO
CONFIG_CFB_CONSOLE
CONFIG_VIDEO_SW_CURSOR
CONFIG_VGA_AS_SINGLE_DEVICE
CONFIG_VIDEO_LOGO
CONFIG_VIDEO_BMP_LOGO
The DIU driver will look for the 'video-mode' environment
variable, and if defined, enable the DIU as a console during
boot. See the documentation file doc/README.video for a
description of this variable.
- LCD Support: CONFIG_LCD
Define this to enable LCD support (for output to LCD
display); also select one of the supported displays
by defining one of these:
CONFIG_ATMEL_LCD:
HITACHI TX09D70VM1CCA, 3.5", 240x320.
NEC NL6448AC33-18. Active, color, single scan.
NEC NL6448BC20-08. 6.5", 640x480.
Active, color, single scan.
CONFIG_NEC_NL6448BC33_54
NEC NL6448BC33-54. 10.4", 640x480.
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Active, color, single scan.
CONFIG_SHARP_16x9
Sharp 320x240. Active, color, single scan.
It isn't 16x9, and I am not sure what it is.
CONFIG_SHARP_LQ64D341
Sharp LQ64D341 display, 640x480.
Active, color, single scan.
CONFIG_HLD1045
HLD1045 display, 640x480.
Active, color, single scan.
CONFIG_OPTREX_BW
Optrex CBL50840-2 NF-FW 99 22 M5
or
Hitachi LMG6912RPFC-00T
or
Hitachi SP14Q002
320x240. Black & white.
CONFIG_LCD_ALIGNMENT
Normally the LCD is page-aligned (typically 4KB). If this is
defined then the LCD will be aligned to this value instead.
For ARM it is sometimes useful to use MMU_SECTION_SIZE
here, since it is cheaper to change data cache settings on
a per-section basis.
CONFIG_LCD_ROTATION
Sometimes, for example if the display is mounted in portrait
mode or even if it's mounted landscape but rotated by 180degree,
we need to rotate our content of the display relative to the
framebuffer, so that user can read the messages which are
printed out.
Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
initialized with a given rotation from "vl_rot" out of
"vidinfo_t" which is provided by the board specific code.
The value for vl_rot is coded as following (matching to
fbcon=rotate:<n> linux-kernel commandline):
0 = no rotation respectively 0 degree
1 = 90 degree rotation
2 = 180 degree rotation
3 = 270 degree rotation
If CONFIG_LCD_ROTATION is not defined, the console will be
initialized with 0degree rotation.
CONFIG_LCD_BMP_RLE8
Support drawing of RLE8-compressed bitmaps on the LCD.
CONFIG_I2C_EDID
Enables an 'i2c edid' command which can read EDID
information over I2C from an attached LCD display.
- Splash Screen Support: CONFIG_SPLASH_SCREEN
If this option is set, the environment is checked for
a variable "splashimage". If found, the usual display
of logo, copyright and system information on the LCD
is suppressed and the BMP image at the address
specified in "splashimage" is loaded instead. The
console is redirected to the "nulldev", too. This
allows for a "silent" boot where a splash screen is
loaded very quickly after power-on.
CONFIG_SPLASHIMAGE_GUARD
If this option is set, then U-Boot will prevent the environment
variable "splashimage" from being set to a problematic address
(see doc/README.displaying-bmps).
This option is useful for targets where, due to alignment
restrictions, an improperly aligned BMP image will cause a data
abort. If you think you will not have problems with unaligned
accesses (for example because your toolchain prevents them)
there is no need to set this option.
CONFIG_SPLASH_SCREEN_ALIGN
If this option is set the splash image can be freely positioned
on the screen. Environment variable "splashpos" specifies the
position as "x,y". If a positive number is given it is used as
number of pixel from left/top. If a negative number is given it
is used as number of pixel from right/bottom. You can also
specify 'm' for centering the image.
Example:
setenv splashpos m,m
=> image at center of screen
setenv splashpos 30,20
=> image at x = 30 and y = 20
setenv splashpos -10,m
=> vertically centered image
at x = dspWidth - bmpWidth - 9
- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
If this option is set, additionally to standard BMP
images, gzipped BMP images can be displayed via the
splashscreen support or the bmp command.
- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
If this option is set, 8-bit RLE compressed BMP images
can be displayed via the splashscreen support or the
bmp command.
CONFIG_GZIP
Enabled by default to support gzip compressed images.
CONFIG_BZIP2
If this option is set, support for bzip2 compressed
images is included. If not, only uncompressed and gzip
compressed images are supported.
NOTE: the bzip2 algorithm requires a lot of RAM, so
the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
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- MII/PHY support:
CONFIG_PHY_ADDR
The address of PHY on MII bus.
CONFIG_PHY_CLOCK_FREQ (ppc4xx)
The clock frequency of the MII bus
CONFIG_PHY_RESET_DELAY
Some PHY like Intel LXT971A need extra delay after
reset before any MII register access is possible.
For such PHY, set this option to the usec delay
required. (minimum 300usec for LXT971A)
CONFIG_PHY_CMD_DELAY (ppc4xx)
Some PHY like Intel LXT971A need extra delay after
command issued before MII status register can be read
- IP address:
CONFIG_IPADDR
Define a default value for the IP address to use for
the default Ethernet interface, in case this is not
(Environment variable "ipaddr")
Defines a default value for the IP address of a TFTP
(Environment variable "serverip")
CONFIG_KEEP_SERVERADDR
Keeps the server's MAC address, in the env 'serveraddr'
for passing to bootargs (like Linux's netconsole option)
- Gateway IP address:
CONFIG_GATEWAYIP
Defines a default value for the IP address of the
default router where packets to other networks are
sent to.
(Environment variable "gatewayip")
- Subnet mask:
CONFIG_NETMASK
Defines a default value for the subnet mask (or
routing prefix) which is used to determine if an IP
address belongs to the local subnet or needs to be
forwarded through a router.
(Environment variable "netmask")
- Multicast TFTP Mode:
CONFIG_MCAST_TFTP
Defines whether you want to support multicast TFTP as per
rfc-2090; for example to work with atftp. Lets lots of targets
tftp down the same boot image concurrently. Note: the Ethernet
driver in use must provide a function: mcast() to join/leave a
multicast group.
- BOOTP Recovery Mode:
CONFIG_BOOTP_RANDOM_DELAY
If you have many targets in a network that try to
boot using BOOTP, you may want to avoid that all
systems send out BOOTP requests at precisely the same
moment (which would happen for instance at recovery
from a power failure, when all systems will try to
boot, thus flooding the BOOTP server. Defining
CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
inserted before sending out BOOTP requests. The
following delays are inserted then:
1st BOOTP request: delay 0 ... 1 sec
2nd BOOTP request: delay 0 ... 2 sec
3rd BOOTP request: delay 0 ... 4 sec
4th and following
BOOTP requests: delay 0 ... 8 sec
CONFIG_BOOTP_ID_CACHE_SIZE
BOOTP packets are uniquely identified using a 32-bit ID. The
server will copy the ID from client requests to responses and
U-Boot will use this to determine if it is the destination of
an incoming response. Some servers will check that addresses
aren't in use before handing them out (usually using an ARP
ping) and therefore take up to a few hundred milliseconds to
respond. Network congestion may also influence the time it
takes for a response to make it back to the client. If that
time is too long, U-Boot will retransmit requests. In order
to allow earlier responses to still be accepted after these
retransmissions, U-Boot's BOOTP client keeps a small cache of
IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
cache. The default is to keep IDs for up to four outstanding
requests. Increasing this will allow U-Boot to accept offers
from a BOOTP client in networks with unusually high latency.
Stefan Roese
committed
- DHCP Advanced Options:
You can fine tune the DHCP functionality by defining
CONFIG_BOOTP_* symbols:
CONFIG_BOOTP_SUBNETMASK
CONFIG_BOOTP_GATEWAY
CONFIG_BOOTP_HOSTNAME
CONFIG_BOOTP_NISDOMAIN
CONFIG_BOOTP_BOOTPATH
CONFIG_BOOTP_BOOTFILESIZE
CONFIG_BOOTP_DNS
CONFIG_BOOTP_DNS2
CONFIG_BOOTP_SEND_HOSTNAME
CONFIG_BOOTP_NTPSERVER
CONFIG_BOOTP_TIMEOFFSET
CONFIG_BOOTP_VENDOREX
Stefan Roese
committed
CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
environment variable, not the BOOTP server.
Stefan Roese
committed
CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
after the configured retry count, the call will fail
instead of starting over. This can be used to fail over
to Link-local IP address configuration if the DHCP server
is not available.
Stefan Roese
committed
CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
serverip from a DHCP server, it is possible that more
than one DNS serverip is offered to the client.
If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
serverip will be stored in the additional environment
variable "dnsip2". The first DNS serverip is always
stored in the variable "dnsip", when CONFIG_BOOTP_DNS
Stefan Roese
committed
CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
to do a dynamic update of a DNS server. To do this, they
need the hostname of the DHCP requester.
If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
of the "hostname" environment variable is passed as
option 12 to the DHCP server.
Stefan Roese
committed
CONFIG_BOOTP_DHCP_REQUEST_DELAY
A 32bit value in microseconds for a delay between
receiving a "DHCP Offer" and sending the "DHCP Request".
This fixes a problem with certain DHCP servers that don't
respond 100% of the time to a "DHCP request". E.g. On an
AT91RM9200 processor running at 180MHz, this delay needed
to be *at least* 15,000 usec before a Windows Server 2003
DHCP server would reply 100% of the time. I recommend at
least 50,000 usec to be safe. The alternative is to hope
that one of the retries will be successful but note that
the DHCP timeout and retry process takes a longer than
this delay.
- Link-local IP address negotiation:
Negotiate with other link-local clients on the local network
for an address that doesn't require explicit configuration.
This is especially useful if a DHCP server cannot be guaranteed
to exist in all environments that the device must operate.
See doc/README.link-local for more information.
The device id used in CDP trigger frames.
CONFIG_CDP_DEVICE_ID_PREFIX
A two character string which is prefixed to the MAC address
of the device.
CONFIG_CDP_PORT_ID
A printf format string which contains the ascii name of
the port. Normally is set to "eth%d" which sets
eth0 for the first Ethernet, eth1 for the second etc.
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CONFIG_CDP_CAPABILITIES
A 32bit integer which indicates the device capabilities;
0x00000010 for a normal host which does not forwards.
CONFIG_CDP_VERSION
An ascii string containing the version of the software.
CONFIG_CDP_PLATFORM
An ascii string containing the name of the platform.
CONFIG_CDP_TRIGGER
A 32bit integer sent on the trigger.
CONFIG_CDP_POWER_CONSUMPTION
A 16bit integer containing the power consumption of the
device in .1 of milliwatts.
CONFIG_CDP_APPLIANCE_VLAN_TYPE
A byte containing the id of the VLAN.
- Status LED: CONFIG_LED_STATUS
Several configurations allow to display the current
status using a LED. For instance, the LED will blink
fast while running U-Boot code, stop blinking as
soon as a reply to a BOOTP request was received, and
start blinking slow once the Linux kernel is running
(supported by a status LED driver in the Linux
kernel). Defining CONFIG_LED_STATUS enables this
The status LED can be connected to a GPIO pin.
In such cases, the gpio_led driver can be used as a
status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
to include the gpio_led driver in the U-Boot binary.
CONFIG_GPIO_LED_INVERTED_TABLE
Some GPIO connected LEDs may have inverted polarity in which
case the GPIO high value corresponds to LED off state and
GPIO low value corresponds to LED on state.
In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
with a list of GPIO LEDs that have inverted polarity.
- I2C Support: CONFIG_SYS_I2C
This enable the NEW i2c subsystem, and will allow you to use
i2c commands at the u-boot command line (as long as you set
CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
based realtime clock chips or other i2c devices. See
common/cmd_i2c.c for a description of the command line
interface.
ported i2c driver to the new framework:
- drivers/i2c/soft_i2c.c:
- activate first bus with CONFIG_SYS_I2C_SOFT define
CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
for defining speed and slave address
- activate second bus with I2C_SOFT_DECLARATIONS2 define
CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
for defining speed and slave address
- activate third bus with I2C_SOFT_DECLARATIONS3 define
CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
for defining speed and slave address
- activate fourth bus with I2C_SOFT_DECLARATIONS4 define
CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
for defining speed and slave address
- drivers/i2c/fsl_i2c.c:
- activate i2c driver with CONFIG_SYS_I2C_FSL
define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
bus.
- If your board supports a second fsl i2c bus, define
CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
CONFIG_SYS_FSL_I2C2_SPEED for the speed and
CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
second bus.
- drivers/i2c/tegra_i2c.c:
- activate this driver with CONFIG_SYS_I2C_TEGRA
- This driver adds 4 i2c buses with a fix speed from
100000 and the slave addr 0!
- drivers/i2c/ppc4xx_i2c.c
- activate this driver with CONFIG_SYS_I2C_PPC4XX
- CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
- CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
- drivers/i2c/i2c_mxc.c
- activate this driver with CONFIG_SYS_I2C_MXC
- enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
- enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
- enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
- enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
- define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
- define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
- define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
- define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
- define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
- define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
- define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
- define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
If those defines are not set, default value is 100000
- drivers/i2c/rcar_i2c.c:
- activate this driver with CONFIG_SYS_I2C_RCAR
- This driver adds 4 i2c buses
- CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
- CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
- CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
- CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
- CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
- CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
- CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
- CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
- CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
- drivers/i2c/sh_i2c.c:
- activate this driver with CONFIG_SYS_I2C_SH
- This driver adds from 2 to 5 i2c buses
- CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
- CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
- CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
- CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
- CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
- CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
- CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
- CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
- CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
- CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
- CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
- drivers/i2c/omap24xx_i2c.c
- activate this driver with CONFIG_SYS_I2C_OMAP24XX
- CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
- CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
- CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
- CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
- CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
- CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
- CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
- CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
- CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
- CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
- drivers/i2c/zynq_i2c.c
- activate this driver with CONFIG_SYS_I2C_ZYNQ
- set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting
- set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr
- drivers/i2c/s3c24x0_i2c.c:
- activate this driver with CONFIG_SYS_I2C_S3C24X0
- This driver adds i2c buses (11 for Exynos5250, Exynos5420
9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
with a fix speed from 100000 and the slave addr 0!
- drivers/i2c/ihs_i2c.c
- activate this driver with CONFIG_SYS_I2C_IHS
- CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
- CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
- CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
- CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
- CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
- CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
- CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
- CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
- CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
- CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
- CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
- CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
- activate dual channel with CONFIG_SYS_I2C_IHS_DUAL
- CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
- CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
- CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1
- CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1
- CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1
- CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1
- CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1
- CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1
additional defines:
CONFIG_SYS_NUM_I2C_BUSES
Hold the number of i2c buses you want to use.
CONFIG_SYS_I2C_DIRECT_BUS
define this, if you don't use i2c muxes on your hardware.
if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
omit this define.
CONFIG_SYS_I2C_MAX_HOPS
define how many muxes are maximal consecutively connected
on one i2c bus. If you not use i2c muxes, omit this
define.
CONFIG_SYS_I2C_BUSES
hold a list of buses you want to use, only used if
CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
CONFIG_SYS_NUM_I2C_BUSES = 9:
CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
{0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
{0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
{0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
{0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
{0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
{1, {I2C_NULL_HOP}}, \
{1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
{1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
}
which defines
bus 0 on adapter 0 without a mux
bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
bus 6 on adapter 1 without a mux
bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
If you do not have i2c muxes on your board, omit this define.
If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
then the following macros need to be defined (examples are
from include/configs/lwmon.h):
(Optional). Any commands necessary to enable the I2C
controller or configure ports.
eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
I2C_ACTIVE
The code necessary to make the I2C data line active
(driven). If the data line is open collector, this
define can be null.
eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
I2C_TRISTATE
The code necessary to make the I2C data line tri-stated
(inactive). If the data line is open collector, this
define can be null.
eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
Code that returns true if the I2C data line is high,
false if it is low.
eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
If <bit> is true, sets the I2C data line high. If it
is false, it clears it (low).
if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
else immr->im_cpm.cp_pbdat &= ~PB_SDA
If <bit> is true, sets the I2C clock line high. If it
is false, it clears it (low).
if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
I2C_DELAY
This delay is invoked four times per clock cycle so this
controls the rate of data transfer. The data rate thus
is 1 / (I2C_DELAY * 4). Often defined to be something
like:
CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
If your arch supports the generic GPIO framework (asm/gpio.h),
then you may alternatively define the two GPIOs that are to be
used as SCL / SDA. Any of the previous I2C_xxx macros will
have GPIO-based defaults assigned to them as appropriate.
You should define these to the GPIO value as given directly to
the generic GPIO functions.
CONFIG_SYS_I2C_INIT_BOARD
When a board is reset during an i2c bus transfer
chips might think that the current transfer is still
in progress. On some boards it is possible to access
the i2c SCLK line directly, either by using the
processor pin as a GPIO or by having a second pin
connected to the bus. If this option is defined a
custom i2c_init_board() routine in boards/xxx/board.c
is run early in the boot sequence.
CONFIG_I2C_MULTI_BUS
This option allows the use of multiple I2C buses, each of which
must have a controller. At any point in time, only one bus is
active. To switch to a different bus, use the 'i2c dev' command.