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Commit 26473945 authored by Tom Rini's avatar Tom Rini
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Merge branch 'master' of http://git.denx.de/u-boot-sunxi

parents 6f4e0506 7f7409ba
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with 151 additions and 111 deletions
......@@ -643,11 +643,17 @@ config ARCH_SOCFPGA
config ARCH_SUNXI
bool "Support sunxi (Allwinner) SoCs"
select CMD_USB
select DM
select DM_GPIO
select DM_ETH
select DM_SERIAL
select DM_USB
select OF_CONTROL
select OF_SEPARATE
select SPL_DISABLE_OF_CONTROL
select USB
select USB_STORAGE
config TARGET_SNOWBALL
bool "Support snowball"
......
......@@ -11,6 +11,7 @@
*/
#include <common.h>
#include <mmc.h>
#include <i2c.h>
#include <serial.h>
#ifdef CONFIG_SPL_BUILD
......@@ -22,6 +23,7 @@
#include <asm/arch/gpio.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/timer.h>
#include <asm/arch/mmc.h>
#include <linux/compiler.h>
......@@ -121,17 +123,18 @@ void s_init(void)
}
#ifdef CONFIG_SPL_BUILD
DECLARE_GLOBAL_DATA_PTR;
/* The sunxi internal brom will try to loader external bootloader
* from mmc0, nand flash, mmc2.
* Unfortunately we can't check how SPL was loaded so assume
* it's always the first SD/MMC controller
*/
u32 spl_boot_device(void)
{
struct mmc *mmc0, *mmc1;
/*
* When booting from the SD card, the "eGON.BT0" signature is expected
* to be found in memory at the address 0x0004 (see the "mksunxiboot"
* tool, which generates this header).
* When booting from the SD card or NAND memory, the "eGON.BT0"
* signature is expected to be found in memory at the address 0x0004
* (see the "mksunxiboot" tool, which generates this header).
*
* When booting in the FEL mode over USB, this signature is patched in
* memory and replaced with something else by the 'fel' tool. This other
......@@ -139,15 +142,40 @@ u32 spl_boot_device(void)
* valid bootable SD card image (because the BROM would refuse to
* execute the SPL in this case).
*
* This branch is just making a decision at runtime whether to load
* the main u-boot binary from the SD card (if the "eGON.BT0" signature
* is found) or return to the FEL code in the BROM to wait and receive
* the main u-boot binary over USB.
* This checks for the signature and if it is not found returns to
* the FEL code in the BROM to wait and receive the main u-boot
* binary over USB. If it is found, it determines where SPL was
* read from.
*/
if (readl(4) == 0x4E4F4765 && readl(8) == 0x3054422E) /* eGON.BT0 */
return BOOT_DEVICE_MMC1;
else
if (readl(4) != 0x4E4F4765 || readl(8) != 0x3054422E) /* eGON.BT0 */
return BOOT_DEVICE_BOARD;
/* The BROM will try to boot from mmc0 first, so try that first. */
mmc_initialize(gd->bd);
mmc0 = find_mmc_device(0);
if (sunxi_mmc_has_egon_boot_signature(mmc0))
return BOOT_DEVICE_MMC1;
/* Fallback to booting NAND if enabled. */
if (IS_ENABLED(CONFIG_SPL_NAND_SUPPORT))
return BOOT_DEVICE_NAND;
if (CONFIG_MMC_SUNXI_SLOT_EXTRA == 2) {
mmc1 = find_mmc_device(1);
if (sunxi_mmc_has_egon_boot_signature(mmc1)) {
/*
* spl_mmc.c: spl_mmc_load_image() is hard-coded to
* use find_mmc_device(0), no matter what we
* return. Swap mmc0 and mmc2 to make this work.
*/
mmc0->block_dev.dev = 1;
mmc1->block_dev.dev = 0;
return BOOT_DEVICE_MMC2;
}
}
panic("Could not determine boot source\n");
return -1; /* Never reached */
}
/* No confirmation data available in SPL yet. Hardcode bootmode */
......
......@@ -44,6 +44,7 @@ static struct sunxi_usb_phy {
int usb_rst_mask;
int gpio_vbus;
int gpio_vbus_det;
int gpio_id_det;
int id;
int init_count;
int power_on_count;
......@@ -82,6 +83,14 @@ static int get_vbus_detect_gpio(int index)
return -EINVAL;
}
static int get_id_detect_gpio(int index)
{
switch (index) {
case 0: return sunxi_name_to_gpio(CONFIG_USB0_ID_DET);
}
return -EINVAL;
}
static void usb_phy_write(struct sunxi_usb_phy *phy, int addr,
int data, int len)
{
......@@ -228,10 +237,8 @@ int sunxi_usb_phy_vbus_detect(int index)
struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
int err, retries = 3;
if (phy->gpio_vbus_det < 0) {
eprintf("Error: invalid vbus detection pin\n");
if (phy->gpio_vbus_det < 0)
return phy->gpio_vbus_det;
}
err = gpio_get_value(phy->gpio_vbus_det);
/*
......@@ -247,6 +254,16 @@ int sunxi_usb_phy_vbus_detect(int index)
return err;
}
int sunxi_usb_phy_id_detect(int index)
{
struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
if (phy->gpio_id_det < 0)
return phy->gpio_id_det;
return gpio_get_value(phy->gpio_id_det);
}
int sunxi_usb_phy_probe(void)
{
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
......@@ -275,6 +292,18 @@ int sunxi_usb_phy_probe(void)
if (ret)
return ret;
}
phy->gpio_id_det = get_id_detect_gpio(i);
if (phy->gpio_id_det >= 0) {
ret = gpio_request(phy->gpio_id_det, "usb_id_det");
if (ret)
return ret;
ret = gpio_direction_input(phy->gpio_id_det);
if (ret)
return ret;
sunxi_gpio_set_pull(phy->gpio_id_det,
SUNXI_GPIO_PULL_UP);
}
}
setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
......@@ -298,6 +327,9 @@ int sunxi_usb_phy_remove(void)
if (phy->gpio_vbus_det >= 0)
gpio_free(phy->gpio_vbus_det);
if (phy->gpio_id_det >= 0)
gpio_free(phy->gpio_id_det);
}
return 0;
......
......@@ -52,14 +52,6 @@
model = "Utoo P66";
compatible = "utoo,p66", "allwinner,sun5i-a13";
aliases {
serial0 = &uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
i2c_lcd: i2c@0 {
/* The lcd panel i2c interface is hooked up via gpios */
compatible = "i2c-gpio";
......@@ -227,12 +219,6 @@
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_b>;
status = "okay";
};
&usbphy {
usb0_vbus-supply = <&reg_usb0_vbus>;
usb1_vbus-supply = <&reg_ldo3>;
......
......@@ -332,6 +332,24 @@
#size-cells = <0>;
};
ehci0: usb@01c1a000 {
compatible = "allwinner,sun8i-a23-ehci", "generic-ehci";
reg = <0x01c1a000 0x100>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ahb1_gates 26>;
resets = <&ahb1_rst 26>;
status = "disabled";
};
ohci0: usb@01c1a400 {
compatible = "allwinner,sun8i-a23-ohci", "generic-ohci";
reg = <0x01c1a400 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ahb1_gates 29>, <&usb_clk 16>;
resets = <&ahb1_rst 29>;
status = "disabled";
};
pio: pinctrl@01c20800 {
/* compatible gets set in SoC specific dtsi file */
reg = <0x01c20800 0x400>;
......
......@@ -61,6 +61,10 @@
};
};
&ehci0 {
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
......@@ -109,6 +113,10 @@
status = "okay";
};
&ohci0 {
status = "okay";
};
&pio {
mmc0_cd_pin_q8h: mmc0_cd_pin@0 {
allwinner,pins = "PB4";
......
......@@ -127,4 +127,5 @@ struct sunxi_mmc {
#define SUNXI_MMC_COMMON_RESET (1 << 18)
struct mmc *sunxi_mmc_init(int sdc_no);
int sunxi_mmc_has_egon_boot_signature(struct mmc *mmc);
#endif /* _SUNXI_MMC_H */
......@@ -17,4 +17,12 @@ void sunxi_usb_phy_exit(int index);
void sunxi_usb_phy_power_on(int index);
void sunxi_usb_phy_power_off(int index);
int sunxi_usb_phy_vbus_detect(int index);
int sunxi_usb_phy_id_detect(int index);
void sunxi_usb_phy_enable_squelch_detect(int index, int enable);
/* Not really phy related, but we have to declare this somewhere ... */
#if defined(CONFIG_MUSB_HOST) || defined(CONFIG_MUSB_GADGET)
void sunxi_musb_board_init(void);
#else
#define sunxi_musb_board_init()
#endif
......@@ -294,6 +294,13 @@ config USB0_VBUS_DET
Set the Vbus detect pin for usb0 (otg). This takes a string in the
format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
config USB0_ID_DET
string "ID detect pin for usb0 (otg)"
default ""
---help---
Set the ID detect pin for usb0 (otg). This takes a string in the
format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
config USB1_VBUS_PIN
string "Vbus enable pin for usb1 (ehci0)"
default "PH6" if MACH_SUN4I || MACH_SUN7I
......
......@@ -31,7 +31,6 @@
#include <asm/arch/usb_phy.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <linux/usb/musb.h>
#include <net.h>
#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
......@@ -294,21 +293,19 @@ int board_mmc_init(bd_t *bis)
return -1;
#endif
#if CONFIG_MMC_SUNXI_SLOT == 0 && CONFIG_MMC_SUNXI_SLOT_EXTRA == 2
#if !defined(CONFIG_SPL_BUILD) && CONFIG_MMC_SUNXI_SLOT_EXTRA == 2
/*
* Both mmc0 and mmc2 are bootable, figure out where we're booting
* from. Try mmc0 first, just like the brom does.
* On systems with an emmc (mmc2), figure out if we are booting from
* the emmc and if we are make it "mmc dev 0" so that boot.scr, etc.
* are searched there first. Note we only do this for u-boot proper,
* not for the SPL, see spl_boot_device().
*/
if (mmc_getcd(mmc0) && mmc_init(mmc0) == 0 &&
mmc0->block_dev.block_read(0, 16, 1, buf) == 1) {
buf[12] = 0;
if (strcmp(&buf[4], "eGON.BT0") == 0)
return 0;
if (!sunxi_mmc_has_egon_boot_signature(mmc0) &&
sunxi_mmc_has_egon_boot_signature(mmc1)) {
/* Booting from emmc / mmc2, swap */
mmc0->block_dev.dev = 1;
mmc1->block_dev.dev = 0;
}
/* no bootable card in mmc0, so we must be booting from mmc2, swap */
mmc0->block_dev.dev = 1;
mmc1->block_dev.dev = 0;
#endif
return 0;
......@@ -451,28 +448,6 @@ void sunxi_board_init(void)
}
#endif
#if defined(CONFIG_MUSB_HOST) || defined(CONFIG_MUSB_GADGET)
extern const struct musb_platform_ops sunxi_musb_ops;
static struct musb_hdrc_config musb_config = {
.multipoint = 1,
.dyn_fifo = 1,
.num_eps = 6,
.ram_bits = 11,
};
static struct musb_hdrc_platform_data musb_plat = {
#if defined(CONFIG_MUSB_HOST)
.mode = MUSB_HOST,
#else
.mode = MUSB_PERIPHERAL,
#endif
.config = &musb_config,
.power = 250,
.platform_ops = &sunxi_musb_ops,
};
#endif
#ifdef CONFIG_USB_GADGET
int g_dnl_board_usb_cable_connected(void)
{
......@@ -535,9 +510,8 @@ int misc_init_r(void)
if (ret)
return ret;
#endif
#if defined(CONFIG_MUSB_HOST) || defined(CONFIG_MUSB_GADGET)
musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE);
#endif
sunxi_musb_board_init();
return 0;
}
#endif
......
......@@ -7,11 +7,8 @@ CONFIG_SYS_CLK_FREQ=912000000
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPC(3),USB_EHCI"
CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPC(3)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
......@@ -9,11 +9,8 @@ CONFIG_USB1_VBUS_PIN="PB10"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,SUNXI_EMAC,USB_EHCI"
CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,SUNXI_EMAC"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
......@@ -13,11 +13,8 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,USB_EHCI"
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
......@@ -14,11 +14,8 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER,USB_EHCI"
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
......@@ -8,12 +8,9 @@ CONFIG_USB0_VBUS_DET="PH5"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPC(3),USB_EHCI"
CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPC(3)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DM_SERIAL=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
......@@ -5,12 +5,9 @@ CONFIG_DRAM_CLK=480
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPC(3),USB_EHCI"
CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPC(3)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DM_SERIAL=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
......@@ -9,12 +9,9 @@ CONFIG_VIDEO_VGA=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI"
CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DM_SERIAL=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
......@@ -19,5 +19,3 @@ CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
......@@ -18,5 +18,3 @@ CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
......@@ -6,11 +6,8 @@ CONFIG_USB1_VBUS_PIN="PG13"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t004"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,USB_EHCI"
CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
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