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Commit 8651eb1f authored by Simon Glass's avatar Simon Glass Committed by Tom Rini
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README: Drop SoC-specific comment about SPL


This should not be in the generic README file, so drop it.

Signed-off-by: Simon Glass's avatarSimon Glass <sjg@chromium.org>
parent e16bfd9e
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......@@ -213,15 +213,7 @@ board_init_r():
there.
SPL-specific notes:
- stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
CONFIG_SYS_FSL_HAS_CCI400
Defined For SoC that has cache coherent interconnect
CCN-400
CONFIG_SYS_FSL_HAS_CCN504
Defined for SoC that has cache coherent interconnect CCN-504
- stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined
The following options need to be configured:
......
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