riscv: andes_plicsw: Fix IPI during OpenSBI invocation
On some AE350 boards, we need to explicitly initialize the priority registers to a non-zero value so the boot hart can instruct secondary harts to jump to OpenSBI. This patch also updates the information about PLICSW. Signed-off-by:Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com>
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