- Aug 12, 2024
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"usb_host1_xhci" and related node were already upstreamed. remove unnecessary properties from u-boot.dtsi. Signed-off-by:
FUKAUMI Naoki <naoki@radxa.com> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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"sfc" node was already upstreamed. remove unnecessary properties from u-boot.dtsi. Signed-off-by:
FUKAUMI Naoki <naoki@radxa.com> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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The Rock 5 ITX is a board in ITX form factor using the RK3588 SoC It can be powered either by 12V, ATX power-supply or PoE. Notable peripherals are the 4 SATA ports, M.2 M-Key slot, M.2 E-key slot, 2*2.5Gb PCIe-connected Ethernet NICs. Display options are 2*HDMI, DP via USB-c, eDP + 2*DSI via PCB connectors. USB ports are 4*USB3 + 2*USB2 on the back panel and 2-port front-panel connector. Schematics for the board can be found on - https://dl.radxa.com/rock5/5itx/radxa_rock_5_itx_X1100_schematic.pdf - https://dl.radxa.com/rock5/5itx/v1110/radxa_rock_5itx_v1110_schematic.pdf The naming scheme with the dashes follows Dragan's comment on the mainline devicetree commit: "the name of this board deviates from the standard Radxa naming scheme, which is something like "ROCK <number><letter>" thus, "rock-5a" is fine, but it should be "rock-5-itx", simply because there's a space between "5" and "ITX" in "ROCK 5 ITX" Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com> Signed-off-by:
Kever Yang <kever.yang@rock-chips.com>
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- Aug 09, 2024
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on-board USB 2.0 hub, FE1.1s, has Transaction Translator which can handle USB 1.x devices via "usb_host0_ehci". so we can omit "usb_host0_ohci" and make boot faster (a little). => usb start starting USB... Bus usb@fd000000: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 Bus usb@fd800000: USB EHCI 1.00 Bus usb@fd880000: USB EHCI 1.00 Bus usb@fd8c0000: USB OHCI 1.0 scanning bus usb@fd000000 for devices... 1 USB Device(s) found scanning bus usb@fd800000 for devices... 2 USB Device(s) found scanning bus usb@fd880000 for devices... 1 USB Device(s) found scanning bus usb@fd8c0000 for devices... 3 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found => usb tree USB device tree: 1 Hub (5 Gb/s, 0mA) U-Boot XHCI Host Controller 1 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-2 Hub (480 Mb/s, 100mA) USB 2.0 Hub 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (12 Mb/s, 0mA) | U-Boot Root Hub | +-2 Hub (12 Mb/s, 100mA) | ALCOR Generic USB Hub | +-3 Mass Storage (12 Mb/s, 300mA) JetFlash Mass Storage Device 02K1RNH5MJFV4TX6 => usb reset resetting USB... Host not halted after 16000 microseconds. Bus usb@fd000000: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 Bus usb@fd800000: USB EHCI 1.00 Bus usb@fd880000: USB EHCI 1.00 Bus usb@fd8c0000: USB OHCI 1.0 scanning bus usb@fd000000 for devices... 1 USB Device(s) found scanning bus usb@fd800000 for devices... 4 USB Device(s) found scanning bus usb@fd880000 for devices... 1 USB Device(s) found scanning bus usb@fd8c0000 for devices... 1 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found => usb tree USB device tree: 1 Hub (5 Gb/s, 0mA) U-Boot XHCI Host Controller 1 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-2 Hub (480 Mb/s, 100mA) | USB 2.0 Hub | +-3 Hub (12 Mb/s, 100mA) | ALCOR Generic USB Hub | +-4 Mass Storage (12 Mb/s, 300mA) JetFlash Mass Storage Device 02K1RNH5MJFV4TX6 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (12 Mb/s, 0mA) U-Boot Root Hub Signed-off-by:
FUKAUMI Naoki <naoki@radxa.com> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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The CM3588 NAS by FriendlyElec pairs the CM3588 compute module, based on the Rockchip RK3588 SoC, with the CM3588 NAS Kit carrier board. Features tested on a CM3588 NAS Kit with 8GB RAM 64GB eMMC module: - SD-card boot - eMMC boot - Ethernet - PCIe/NVMe - USB gadget - USB host Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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The Xunlong Orange Pi 3B is a single-board computer based on the Rockchip RK3566 SoC. The two hw revisions use different io-voltage for Ethernet PHY and can be identified using GPIO4_C4: - v1.1.1: x (internal pull-down) - v2.1: PHY_RESET (external pull-up) Implement rk_board_late_init() to set correct fdtfile env var and board_fit_config_name_match() to load correct FIT config based on what board is detected at runtime so a single board target can be used for both hw revisions. Minimal DTs that includ DT from dts/upstream is added to support booting from both hw revision and only set Ethernet PHY io-voltage when the hw revision is detected at runtime. A side-affect of this is that defconfig show OF_UPSTREAM=n, however dts/upstream DTs is used for this board. Features tested on Orange Pi 3B 4GB (v1.1.1 and v2.1): - SD-card boot - eMMC boot - SPI Flash boot - Ethernet - PCIe/NVMe - USB host Signed-off-by:
Ricardo Pardini <ricardo@pardini.net> Co-developed-by:
Jonas Karlman <jonas@kwiboo.se> Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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The Radxa ZERO 3W/3E is an ultra-small, high-performance single board computer based on the Rockchip RK3566, with a compact form factor and rich interfaces. Implement rk_board_late_init() to set correct fdtfile env var and board_fit_config_name_match() to load correct FIT config based on what board is detected at runtime so a single board target can be used for both board models. Features tested on a ZERO 3W 8GB v1.11: - SD-card boot - eMMC boot - USB gadget - USB host Features tested on a ZERO 3E 4GB v1.2: - SD-card boot - Ethernet - USB gadget - USB host Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Tested-by:
FUKAUMI Naoki <naoki@radxa.com> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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The Radxa ROCK 3B is a single-board computer based on the Pico-ITX form factor (100mm x 75mm). Two versions of the ROCK 3B exists, a community version based on the RK3568 SoC and an industrial version based on the RK3568J SoC. Features tested on ROCK 3B 8GB v1.51 (both variants): - SD-card boot - eMMC boot - SPI Flash boot - Ethernet - PCIe/NVMe - USB gadget - USB host Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Tested-by:
FUKAUMI Naoki <naoki@radxa.com> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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Based on rock-3a-rk3568_defconfig. Tested on v1.31 revision. Board Specifications: - Rockchip RK3566 - 1/2/4GB LPDDR4 2112MT/s - eMMC socket - uSD card slot - M.2 2230 Connector - GbE LAN with POE - 3.5mm jack with mic - HDMI 2.0, MIPI DSI/CSI - USB 3.0 Host, USB 2.0 Host/OTG - 40-pin GPIO expansion ports Signed-off-by:
Maxim Moskalets <maximmosk4@gmail.com> Suggested-by:
Jonas Karlman <jonas@kwiboo.se> Reviewed-by:
Jonas Karlman <jonas@kwiboo.se> Tested-by:
FUKAUMI Naoki <naoki@radxa.com> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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Radxa ROCK S0 is a single-board computer based on the Rockchip RK3308B SoC in an ultra-compact form factor. Add a board target for the board. Features tested on a ROCK S0 v1.2 with 512 MiB RAM and 8 GiB eMMC: - SD-card boot - eMMC boot - Ethernet - USB gadget - USB host Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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With the emmc and uart0 DT nodes updated to v6.11-rc1 in dts/upstream there is no longer any need to keep overrides in board u-boot dtsi. Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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The merged upstream DT node for OTP differs in nodename and will cause following build errors once rk3308.dtsi in dts/upstream is updated: ERROR (duplicate_label): /nvmem@ff210000: Duplicate label 'otp' on /nvmem@ff210000 and /efuse@ff210000 ERROR (duplicate_label): /nvmem@ff210000/id@7: Duplicate label 'cpu_id' on /nvmem@ff210000/id@7 and /efuse@ff210000/id@7 Remove the OTP device node from soc u-boot dtsi in preparation for replacing it with the merged upstream DT node in dts/upstream. Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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Kever Yang authored
The name of rk3568 evb in mainline kernel is rk3568-evb1-v10. Signed-off-by:
Kever Yang <kever.yang@rock-chips.com> Reviewed-by:
Quentin Schulz <quentin.schulz@cherry.de>
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Most Rockchip aarch64 targets have now migrated to use OF_UPSTREAM, however a few of the old dtsi and dt-bindings files still remain. Remove remaining common dtsi and header files that can be included directly from dts/upstream to prevent possible issues when future tags from devicetree-binding is merged. No changes is expected with this. Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Reviewed-by:
Quentin Schulz <quentin.schulz@cherry.de>
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The commit f087f7fd ("rockchip: px30/rk3326: migrate to OF_UPSTREAM") migrated px30/rk3326 boards to use OF_UPSTREAM, however the soc dtsi and dt-bindings files remained. Remove the remaining px30/rk3326 soc dtsi and dt-bindings to ensure the files from dts/upstream is used. The gpio-ranges props is moved to u-boot.dtsi files and a ethernet0 alias is added to px30-firefly, they are missing in the dts/upstream files. No changes are expected with this. Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Reviewed-by:
Quentin Schulz <quentin.schulz@cherry.de>
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The device tree for Rockchip Toybrick TB-RK3588X has been merged into dts/upstream with devicetree-rebasing v6.10-dts, migrate board to OF_UPSTREAM. Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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The device tree for Pine64 PineTab2 has been merged into dts/upstream with devicetree-rebasing v6.10-dts, migrate board to OF_UPSTREAM. Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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Port the RK3308 part of the Rockchip IO Domain driver from linux. This differs from linux version in that vccio3 iodomain bit is enabled in the write ops instead of in an init ops as in linux, this way we can avoid keeping a full state of all supply that have been configured. Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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Add support for packaging the TIFS Stub as it's required for basic Low Power Modes like Deep Sleep. The reason it is packaged using binman and not inherently as part of the DM firmware is because for HS devices, customer owns the customer key and only customer has access to it. DM is release by TI, Since TI doesn't have access to the customer key it cannot have a component that is signed by customer key. Hence, it's left as part of binman to be signed and packaged. While at it, also make sure it's documented in phycore-am62x Reviewed-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Wadim Egorov <w.egorov@phytec.de> Signed-off-by:
Dhruva Gole <d-gole@ti.com>
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Add support for packaging the TIFS Stub as it's required for basic Low Power Modes like Deep Sleep. The reason it is packaged using binman and not inherently as part of the DM firmware is because for HS devices, customer owns the customer key and only customer has access to it. DM is release by TI, Since TI doesn't have access to the customer key it cannot have a component that is signed by customer key. Hence, it's left as part of binman to be signed and packaged. Reviewed-by:
Nishanth Menon <nm@ti.com> Acked-by:
Neha Malcom Francis <n-francis@ti.com> Signed-off-by:
Dhruva Gole <d-gole@ti.com>
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- Aug 06, 2024
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André Przywara authored
The Tanix TX1 is a tiny TV box, featuring the Allwinner H313 SoC with up to 2GB of DRAM and 16GB of eMMC. There is no SD card or Ethernet port on this small device, but it can be booted via the USB debug "FEL" mode. The bootloader could then be written to the eMMC. Add the defconfig for that board, and add the devicetree file to the Makefile, for it to be built. The DRAM parameters were taken from the vendor firmware on the eMMC. Signed-off-by:
Andre Przywara <andre.przywara@arm.com>
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- Aug 05, 2024
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André Przywara authored
Sync the devicetree files from the official Linux kernel tree, v6.10. This is covering Allwinner SoCs with 32-bit and 64-bit ARM cores. Besides mostly cosmectic changes, this adds cpufreq support to H616 boards, Nothing that U-Boot needs for itself, but helpful to pass on to kernels. We also get the .dts files for the Tanix TX1 TV box and three Anbernic handheld gaming devices. As before, this omits the non-backwards compatible changes to the R_INTC controller, to remain compatible with older kernels. Signed-off-by:
Andre Przywara <andre.przywara@arm.com>
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Michal Simek authored
Add support for *_lr SOCs. Without this change chips are not going to be properly identified and bitstream programming won't work. Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/14d8905a89d1b31fbb2318512cf57eb0256c11be.1722347416.git.michal.simek@amd.com
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Vishal Patel authored
The correct operating mode for the fan is inversed (1). The previous pwm driver implementation had a bug and the polarity information was propagated incorrectly to the kernel. The normal (0) polarity specified in the device tree was incorrectly clearing the polarity bit in the counter control register. After the bug fix, setting the polarity to inversed (1) in the device tree will clear the polarity bit. Signed-off-by:
Vishal Patel <vishal.patel@amd.com> Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/4658ae8576882f5d28ad57ca74a7b798a546ec37.1722241096.git.michal.simek@amd.com
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Manikanta Guntupalli authored
Add "rs485-rts-delay" property to uartps node with delay_rts_before_send and delay_rts_after_send values as 10ms for rs485 mode on KD240. 10ms rts delay values have been chosen based on testing with rs485 temperature sensor (which is part of the kit) as safe minimum value for reliable operation at a baud rate of 9600. Signed-off-by:
Manikanta Guntupalli <manikanta.guntupalli@amd.com> Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/0e0c4c067236e11f661c1d067017e1ca975c9ddb.1721297721.git.michal.simek@amd.com
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Michal Simek authored
Compatible string is not the part of dt-schema and also not used by U-Boot or Linux that's why remove it completely. Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/13ccfe6b447c426aad06edbf0b8e52fd1eb97ee3.1721054349.git.michal.simek@amd.com
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Michal Simek authored
dt-schema is forcing some rules for node names that's why align them with it. Labels are not changing that's why this change is not breaking any other board specific DTSes. Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/102d9499e9bab12f89dbf9ceaa49a11d685146b3.1721054306.git.michal.simek@amd.com
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Manikanta Guntupalli authored
Add resets property for UART0 and UART1 nodes Signed-off-by:
Manikanta Guntupalli <manikanta.guntupalli@amd.com> Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/81c602417a5d28dfbce122b2e5a63ff7ddb74594.1721053421.git.michal.simek@amd.com
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Venkatesh Yadav Abbarapu authored
Versal2 mini configuration is designed for running memory test. Signed-off-by:
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20240619071733.10256-2-venkatesh.abbarapu@amd.com Signed-off-by:
Michal Simek <michal.simek@amd.com>
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- Aug 02, 2024
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Fabio Estevam authored
Instead of using the local imx7s-warp devicetree copies from U-Boot, convert the imx7s-warp board to OF_UPSTREAM so that the upstream kernel devicetree can be used instead. Signed-off-by:
Fabio Estevam <festevam@gmail.com> Reviewed-by:
Peng Fan <peng.fan@nxp.com>
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- Jul 31, 2024
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So CONFIG_SYS_BIG_ENDIAN is our cross architecture option for selecting machine endian, while the old CONFIG_CPU_BIG_ENDIAN is defined by Arc only. Use it whenever possible to ensure big endian code path is enabled for all possible big endian machines. Signed-off-by:
Jiaxun Yang <jiaxun.yang@flygoat.com>
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Move SUPPORT_BIG_ENDIAN, SUPPORT_LITTLE_ENDIAN to top-level arch Kconfig and let architectures select them as necessary. Remove if guard for Endianness selection choice so we can have one of SYS_BIG_ENDIAN, SYS_LITTLE_ENDIAN config symbol defined even on single endian system. Default endian to SYS_BIG_ENDIAN for MIPS || MICROBLAZE and LITTLE_ENDIAN for the rest to retain old config behaviour. Note: PPC, SH, Xtensa are technically bi-endian, but I checked compiled u-boot image with readelf, U-Boot currently only support little endian for SH and Xtensa, Big Endian for PPC. Signed-off-by:
Jiaxun Yang <jiaxun.yang@flygoat.com>
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- Jul 25, 2024
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IPQ4019 ESS EDMA support is not yet in upstream Linux, so for now lets use the latest pending Linux DTS node for wired networking. Signed-off-by:
Robert Marko <robert.marko@sartura.hr>
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- Jul 24, 2024
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Enable True Random Number Generator (TRNG) on E850-96 board. To do so: 1. Enable DM_RNG and RNG_EXYNOS for TARGET_E850_96 2. Add TRNG node to E850-96 device tree 3. Enable 'rng' command support for easy TRNG testing TRNG node is already applied in Linux kernel device tree, but it hasn't appeared in upstream dts yet. Add it in U-Boot override dtsi file temporarily; it can be removed once it appears in upstream dts. Signed-off-by:
Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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- Jul 23, 2024
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Tom Rini authored
This board has not been converted to CONFIG_DM_I2C by the deadline. Remove it. Acked-by:
Robert Nelson <robertcnelson@gmail.com> Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This board has not been converted to CONFIG_DM_I2C by the deadline. Remove it. Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
There are no longer any OMAP4 platforms in U-Boot, remove the related functionality. Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This board has not been converted to CONFIG_DM_I2C by the deadline. Remove it. Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This board has not been converted to CONFIG_DM_I2C by the deadline. Remove it. Acked-by:
Robert Nelson <robertcnelson@gmail.com> Signed-off-by:
Tom Rini <trini@konsulko.com>
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- Jul 22, 2024
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Fabio Estevam authored
Instead of using the local imx6sx-udoo-neo devicetree copies from U-Boot, convert the imx6sx-udoo-neo boards to OF_UPSTREAM so that the upstream kernel devicetrees can be used instead. Tested on a imx6sx-udoo-neo-full board. Signed-off-by:
Fabio Estevam <festevam@gmail.com>
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