Laurent Pinchart authored 16 years ago and Wolfgang Denk committed 16 years ago

Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>

Anatolij Gustschin authored 16 years ago and Wolfgang Denk committed 16 years ago

Running mtest command on socrates without specifying
an address range crashes the board. This patch changes
default mtest address range to prevent this behavior.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

Anatolij Gustschin authored 16 years ago and Wolfgang Denk committed 16 years ago

Currently U-Boot crashes after relocation to RAM.
Changing the CPO value of the DDR SDRAM TIMING_CFG_2
register to READ_LAT + 1 (to the value it was before
conversion of socrates to new DDR code) fixes the
problem.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

Anatolij Gustschin authored 16 years ago and Wolfgang Denk committed 16 years ago

Commit be0bd823
changed SPD EEPROM address to 0x51 and DDR SDRAM
detection stopped working. Change this address
back to 0x50.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Add support watchdog for SH4A core (SH7763, SH7780 and SH7785).
And fix some compile warning.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Old U-Boot supported 4KB page size only. If this version, Linux
kernel can not get command line from U-Boot.
SH Linux kernel can change page size and empty_zero_page.
This patch support this function and fix promlem.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Add function of smc911x, pkt_data_pull and pkt_data_push.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Fix TBI PHY accesses to use the proper offset in CPU register space. The
previous code would incorrectly access the TBI PHY by reading/writing to CPU
register space at the same location as would be used to access external PHYs.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andy Fleming <afleming@freescale.com>

After switching to using the CFI flash driver, the correct remapping
of the flash banks was forgotten.

Also, some boards were not adapted, and the old legacy flash driver
was not removed yet.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Peter Tyser authored 16 years ago and Wolfgang Denk committed 16 years ago

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

u-boot@bugs.denx.de authored 16 years ago and Wolfgang Denk committed 16 years ago

This patch is an attempt to implement autoprobing for the Lime
presence on the bus.
Configure GPCM for Lime CS2 and try to access chip ID registers.
Second read atempt delivers register values if the chip is present.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

u-boot@bugs.denx.de authored 16 years ago and Wolfgang Denk committed 16 years ago

Signed-off-by: Detlev Zundel <dzu@denx.de>

Nobuhiro Iwamatsu authored 16 years ago and Wolfgang Denk committed 16 years ago

netdev.h was not include by r2dplus.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>

Heiko Schocher authored 16 years ago and Wolfgang Denk committed 16 years ago

Commit 2a1a2cb6 didnt remove the dummy mem reservation in fdt_chosen,
and this stopped Linux from booting with a Ramdisk. This patch fixes
this, by deleting the useless dummy mem reservation.

When booting with a Ramdisk, a fix offset FDT_RAMDISK_OVERHEAD is now
added to of_size, so we dont need anymore a dummy mem reservation.

I measured the value of FDT_RAMDISK_OVERHEAD on a MPC8270 based
system (=0x44 bytes) and rounded it up to 0x80).

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>

Luigi 'Comio' Mantellini authored 16 years ago and Wolfgang Denk committed 16 years ago

Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

This patch deletes oobavail assignments, they're calculated by the nand
core code in nand_scan_tail, plus current oobavail values are wrong for
the LP NANDs.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>

This patch implements support for flash-based BBT for chips working
through ELBC NAND controller, so that NAND core will not have to re-scan
for bad blocks on every boot.

Because ELBC controller may provide HW-generated ECCs we should adjust
bbt pattern and bbt version positions in the OOB free area.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>

For large page chips, nand_bbt is looking into OOB area, and checking
for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be
reserved for bbt means.

But ELBC driver is specifying ecclayout so that oobfree area starts at
offset 1, so only one byte left for the bbt purposes.

This causes problems with any OOB users, namely JFFS2: after first mount
JFFS2 will fill all OOBs with "erased marker", so OOBs will contain:

  OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

And on the next boot, NAND core will rescan for bad blocks, then will
see "0xff 0x19" pattern, and will mark all blocks as bad ones.

To fix the issue we should implement our own bad block pattern: just one
byte at OOB start. Though, this will work only for x8 chips. For x16
chips two bytes must be checked. Since ELBC driver does not support x16
NANDs (yet), we're safe for now.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Stefan Roese <sr@denx.de>

This patch fixes a problem introdiced with patch
bbeff30c [ppc4xx: Remove superfluous dram_init() call or replace it by
initdram()].

The boards affected are:
- PCI405
- PPChameleonEVB
- quad100hd
- taihu
- zeus

Signed-off-by: Stefan Roese <sr@denx.de>

Ricardo Ribalda authored 16 years ago and Stefan Roese committed 16 years ago

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>

Ricardo Ribalda authored 16 years ago and Stefan Roese committed 16 years ago

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>

Ricardo Ribalda authored 16 years ago and Stefan Roese committed 16 years ago

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

This patch prevents linker error on AT91RM9200 boards, if
CONFIG_CMD_I2_TREE is set.
It implements i2c_set_bus_speed and i2c_get_bus_speed as a dummy function.

Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>

ARM DaVinci: Remove duplicate code in cpu/arm926ejs/davinci/dp83848.c

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>

__ARM__ is given by arm_config.mk automatically.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>