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  1. Jan 22, 2020
  2. Jan 17, 2020
  3. Jan 16, 2020
    • Yangbo Lu's avatar
      powerpc/mpc85xx: drop eSDHC periperhal clock code · c2a8b4f8
      Yangbo Lu authored and Peng Fan's avatar Peng Fan committed
      
      The below patch added eSDHC periperhal clock code initially.
      2d9ca2c7 mmc: fsl_esdhc: Add peripheral clock support
      
      The purpose was to fix up device tree properties "peripheral-frequency"
      so that linux could get the periperhal clock by it.
      However the implementation on both u-boot and linux was only
      for a Freescale SDK release. The linux part implementation had never
      been upstreamed. These code should not have been exist on u-boot
      mainline.
      
      Let's remove the powerpc part changes but keep the changes in
      fsl_esdhc driver. The changes in fsl_esdhc driver could be utilized
      to support SD UHS and eMMC HS200/HS400 speed modes for current
      Layerscape ARM platforms.
      
      Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
      c2a8b4f8
  4. Jan 10, 2020
  5. Jan 07, 2020
  6. Dec 23, 2019
  7. Dec 15, 2019
    • Simon Glass's avatar
      fdt: Show the preprocessed .dts file on error · 1653b6a4
      Simon Glass authored and Bin Meng's avatar Bin Meng committed
      
      When device-tree compilation fails it is sometimes tricky to see which
      line is broken, since the input file to dtc is a pre-processed version
      of the device tree.
      
      Add a line that points to the file that needs to be checked:
      
      When the error is in the main .dts file, output is something like this:
      
         output: 'Error: arch/x86/dts/.chromebook_coral.dtb.pre.tmp:478.46-47
      	syntax error
         FATAL ERROR: Unable to parse input tree
      
      but in fact looking at that file shows nothing useful:
      
         PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_157, UP_20K, DEEP, NF1, HIZCRX1, DISPUPD)
      
      Instead we need to look at the preprocessed file, which shows:
      
         163 ((1U << 30) | (1 << 10)) ((0xb << 10) | PAD_CFG1_IOSSTATE_HIZCRX1)
      
      Here it is clear that PAD_CFG1_IOSSTATE_HIZCRX1 is not defined and so is
      not being resolved by the preprocessor.
      
      This commit adds an additional useful message:
      
         Check arch/x86/dts/.chromebook_coral.dtb.dts.tmp for errors
      
      Note that if the error is reported in an included file, such as
      u-boot.dtsi then the output is the following:
      
         Error: arch/x86/dts/u-boot.dtsi:137.14-15 syntax error
         FATAL ERROR: Unable to parse input tree
      
      But again, if the error is due to a preprocessor failure, like this:
      
         filename = CONFIG_IFW_INPUT_FILE;
      
      then you can't tell what the problem is by looking at the source. All you
      see is the original code:
      
      	intel-ifwi {
      		filename = CONFIG_IFW_INPUT_FILE;
      		...
      		};
      	};
      	intel-fsp-m {
      		filename = CONFIG_FSP_FILE_M;
      	};
      
      Everything looks fine. But looking at the output of the preprocessor:
      
       intel-ifwi {
        filename = CONFIG_IFW_INPUT_FILE;
        ...
       };
       intel-fsp-m {
        filename = "fsp_m.bin";
       };
      
      This shows that the filename (normally "fitimage.bin") has not been
      inserted the preprocess, leading to the realisation that the value should
      be CONFIG_IFWI_INPUT_FILE.
      
      If the above does not make sense, I encourage people to try introducing
      errors in the device tree preprocessed values.
      
      Signed-off-by: Simon Glass's avatarSimon Glass <sjg@chromium.org>
      Reviewed-by: Bin Meng's avatarBin Meng <bmeng.cn@gmail.com>
      1653b6a4
    • Simon Glass's avatar
      dm: gpio: Allow control of GPIO uclass in SPL · bcee8d67
      Simon Glass authored and Bin Meng's avatar Bin Meng committed
      
      At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass
      is included in SPL/TPL without any control for boards. Some boards may
      want to disable this to reduce code size where GPIOs are not needed in
      SPL or TPL.
      
      Add a new Kconfig option to permit this. Default it to 'y' so that
      existing boards work correctly.
      
      Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to
      preserve the current behaviour. Also update the 74x164 GPIO driver since
      it cannot build with SPL.
      
      This allows us to remove the hacks in config_uncmd_spl.h and
      Makefile.uncmd_spl (eventually those files should be removed).
      
      Signed-off-by: Simon Glass's avatarSimon Glass <sjg@chromium.org>
      Reviewed-by: Bin Meng's avatarBin Meng <bmeng.cn@gmail.com>
      bcee8d67
  8. Dec 06, 2019
  9. Dec 04, 2019
  10. Dec 03, 2019
  11. Dec 02, 2019
  12. Nov 23, 2019
  13. Nov 21, 2019
  14. Nov 20, 2019
    • Tom Rini's avatar
      env: Finish migration of common ENV options · a09fea1d
      Tom Rini authored
      
      - In ARMv8 NXP Layerscape platforms we also need to make use of
        CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so.
      - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define
        to 0.
      - Add Kconfig entry for ENV_ADDR.
      - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it.
      - Add ENV_xxx_REDUND options that depend on their primary option and
        SYS_REDUNDAND_ENVIRONMENT
      - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR
        for the pre-main-U-Boot environment location.
      - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but
        rather it being non-zero, as it will now be zero by default.
      - Rework the env_offset absolute in env/embedded.o to not use
        CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within
        ENV_IS_IN_FLASH.
      - Migrate all platforms.
      
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Joe Hershberger <joe.hershberger@ni.com>
      Cc: Patrick Delaunay <patrick.delaunay@st.com>
      Cc: uboot-stm32@st-md-mailman.stormreply.com
      Signed-off-by: default avatarTom Rini <trini@konsulko.com>
      Acked-by: Joe Hershberger's avatarJoe Hershberger <joe.hershberger@ni.com>
      Reviewed-by: default avatarSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
      a09fea1d
    • Tom Rini's avatar
      env: Remove useless CONFIG_ENV_SIZE_REDUND and fix ENV_IS_REDUND check · a8992e78
      Tom Rini authored
      
      We have CONFIG_ENV_SIZE_IS_REDUND but don't really use it.  We have one
      board where we can simply multiple CONFIG_ENV_SIZE by two for the same
      result.  The other place where we could but were not previously using
      this is for where env_internal.h checks for if we should set
      ENV_IS_EMBEDDED.  This seems like the most likely use, historically, of
      the variable, but it was not used.  Add logic to check for this now.
      
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Joe Hershberger <joe.hershberger@ni.com>
      Signed-off-by: default avatarTom Rini <trini@konsulko.com>
      Reviewed-by: Simon Glass's avatarSimon Glass <sjg@chromium.org>
      Acked-by: Joe Hershberger's avatarJoe Hershberger <joe.hershberger@ni.com>
      a8992e78
  15. Nov 17, 2019
  16. Nov 12, 2019
  17. Nov 07, 2019
  18. Nov 06, 2019
  19. Nov 05, 2019
  20. Oct 31, 2019
  21. Oct 15, 2019
    • Giulio Benetti's avatar
      libfdt: fix typo on comment · 4ab6a45e
      Giulio Benetti authored and Simon Glass's avatar Simon Glass committed
      
      Signed-off-by: default avatarGiulio Benetti <giulio.benetti@benettiengineering.com>
      4ab6a45e
    • Matthias Brugger's avatar
      libfdt: Allow #size-cells of 0 · 8076fc29
      Matthias Brugger authored and Simon Glass's avatar Simon Glass committed
      
      The commit "libfdt: fdt_address_cells() and fdt_size_cells()" introduced
      a bug as it consolidated code between the helpers for getting
      be 0, and is frequently found so in practice for /cpus.  IEEE1275 only
      requires implementations to handle 1..4 for #address-cells, although one
      could make a case for #address-cells == #size-cells == 0 being used to
      represent a bridge with a single port.
      
      While we're there, it's not totally obvious that the existing implicit
      cast of a u32 to int will give the correct results according to strict C,
      although it does work in practice.  Straighten that up to cast only after
      we've made our range checks.
      
      This is based on upstream commit:
      b8d6eca ("libfdt: Allow #size-cells of 0")
      but misses the test cases,as we don't implement them in U-Boot.
      
      Signed-off-by: Matthias Brugger's avatarMatthias Brugger <mbrugger@suse.com>
      8076fc29
    • Matthias Brugger's avatar
      libfdt: return correct value if #size-cells property is not present · 0ba41ce1
      Matthias Brugger authored and Simon Glass's avatar Simon Glass committed
      
      According to the device tree specification, the default value for
      was not present.
      
      This patch also makes fdt_address_cells() and fdt_size_cells() conform
      to the behaviour documented in libfdt.h. The defaults are only returned
      if fdt_getprop() returns -FDT_ERR_NOTFOUND, otherwise the actual error
      is returned.
      
      This is based on upstream commit:
      aa7254d ("libfdt: return correct value if #size-cells property is not present")
      but misses the test case part, as we don't implement them in U-Boot.
      
      Signed-off-by: Matthias Brugger's avatarMatthias Brugger <mbrugger@suse.com>
      0ba41ce1
    • Matthias Brugger's avatar
      libfdt: fdt_address_cells() and fdt_size_cells() · ce2dae3a
      Matthias Brugger authored and Simon Glass's avatar Simon Glass committed
      
      Add internal fdt_cells() to avoid copy and paste. Fix typo in
      fdt_size_cells() documentation comment.
      
      This is based in upstream commit:
      c12b2b0 ("libfdt: fdt_address_cells() and fdt_size_cells()")
      but misses the test cases, as we don't implement them in U-Boot.
      
      Signed-off-by: Matthias Brugger's avatarMatthias Brugger <mbrugger@suse.com>
      Reviewed-by: Simon Glass's avatarSimon Glass <sjg@chromium.org>
      ce2dae3a
    • Simon Glass's avatar
      binman: x86: Separate out 16-bit reset and init code · 5e239183
      Simon Glass authored
      
      At present these two sections of code are linked together into a single
      2KB chunk in a single file. Some Intel SoCs like to have a FIT (Firmware
      Interface Table) in the ROM and the pointer for this needs to go at
      0xffffffc0 which is in the middle of these two sections.
      
      Make use of the new 'reset' entry and change the existing 16-bit entry to
      include just the 16-bit data.
      
      Signed-off-by: Simon Glass's avatarSimon Glass <sjg@chromium.org>
      5e239183
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